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git01.mediatek.com / filogic / atf / ee647e38368ca0410b82ce32d98fcb702e4878b4 / . / plat / xilinx / versal_net
tree: 277fe47f67cb556df6c7c55cd2871f9a57affc6d [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. tsp/
  5. bl31_versal_net_setup.c
  6. plat_psci.c
  7. plat_psci_pm.c
  8. plat_topology.c
  9. platform.mk
  10. sip_svc_setup.c
  11. versal_net_ipi.c