Merge pull request #317 from vwadekar/run-bl32-on-tegra-v3
Run bl32 on tegra v3
diff --git a/docs/user-guide.md b/docs/user-guide.md
index c1cadbb..9a9334f 100644
--- a/docs/user-guide.md
+++ b/docs/user-guide.md
@@ -322,7 +322,7 @@
#### ARM development platform specific build options
-* `ARM_TSP_RAM_LOCATION_ID`: location of the TSP binary. Options:
+* `ARM_TSP_RAM_LOCATION`: location of the TSP binary. Options:
- `tsram` : Trusted SRAM (default option)
- `tdram` : Trusted DRAM (if available)
- `dram` : Secure region in DRAM (configured by the TrustZone controller)
diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h
index 056c00d..268438f 100644
--- a/include/plat/arm/css/common/css_def.h
+++ b/include/plat/arm/css/common/css_def.h
@@ -37,11 +37,9 @@
/*************************************************************************
* Definitions common to all ARM Compute SubSystems (CSS)
*************************************************************************/
-#define MHU_SECURE_BASE ARM_SHARED_RAM_BASE
-#define MHU_SECURE_SIZE ARM_SHARED_RAM_SIZE
#define MHU_PAYLOAD_CACHED 0
-#define TRUSTED_MAILBOXES_BASE MHU_SECURE_BASE
+#define TRUSTED_MAILBOXES_BASE ARM_TRUSTED_SRAM_BASE
#define TRUSTED_MAILBOX_SHIFT 4
#define NSROM_BASE 0x1f000000
@@ -66,11 +64,29 @@
#define CSS_IRQ_TZC 80
#define CSS_IRQ_TZ_WDOG 86
-/* SCP <=> AP boot configuration */
-#define SCP_BOOT_CFG_ADDR 0x04000080
+/*
+ * SCP <=> AP boot configuration
+ *
+ * The SCP/AP boot configuration is a 32-bit word located at a known offset from
+ * the start of the Trusted SRAM. Part of this configuration is which CPU is the
+ * primary, according to the shift and mask definitions below.
+ *
+ * Note that the value stored at this address is only valid at boot time, before
+ * the BL3-0 image is transferred to SCP.
+ */
+#define SCP_BOOT_CFG_ADDR (ARM_TRUSTED_SRAM_BASE + 0x80)
#define PRIMARY_CPU_SHIFT 8
#define PRIMARY_CPU_BIT_WIDTH 4
+/*
+ * Base address of the first memory region used for communication between AP
+ * and SCP. Used by the BOM and SCPI protocols.
+ *
+ * Note that this is located at the same address as SCP_BOOT_CFG_ADDR, which
+ * means the SCP/AP configuration data gets overwritten when the AP initiates
+ * communication with the SCP.
+ */
+#define SCP_COM_SHARED_MEM_BASE (ARM_TRUSTED_SRAM_BASE + 0x80)
#define CSS_MAP_DEVICE MAP_REGION_FLAT( \
CSS_DEVICE_BASE, \
diff --git a/plat/arm/board/fvp/aarch64/fvp_helpers.S b/plat/arm/board/fvp/aarch64/fvp_helpers.S
index dd56687..d176fac 100644
--- a/plat/arm/board/fvp/aarch64/fvp_helpers.S
+++ b/plat/arm/board/fvp/aarch64/fvp_helpers.S
@@ -123,7 +123,7 @@
ldr x1, =PWRC_BASE
str w2, [x1, #PSYSR_OFF]
ldr w2, [x1, #PSYSR_OFF]
- ubfx w2, w2, #PSYSR_WK_SHIFT, #PSYSR_WK_MASK
+ ubfx w2, w2, #PSYSR_WK_SHIFT, #PSYSR_WK_WIDTH
cmp w2, #WKUP_PPONR
beq warm_reset
cmp w2, #WKUP_GICREQ
diff --git a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h b/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
index 5b755af..3dc9aad 100644
--- a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
+++ b/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h
@@ -48,7 +48,8 @@
#define PSYSR_PP (1 << 26)
#define PSYSR_WK_SHIFT 24
-#define PSYSR_WK_MASK 0x3
+#define PSYSR_WK_WIDTH 0x2
+#define PSYSR_WK_MASK ((1 << PSYSR_WK_WIDTH) - 1)
#define PSYSR_WK(x) (x >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK
#define WKUP_COLD 0x0
diff --git a/plat/arm/css/common/css_scp_bootloader.c b/plat/arm/css/common/css_scp_bootloader.c
index 6cf1667..acc7351 100644
--- a/plat/arm/css/common/css_scp_bootloader.c
+++ b/plat/arm/css/common/css_scp_bootloader.c
@@ -60,7 +60,7 @@
* Unlike the SCPI protocol, the boot protocol uses the same memory region
* for both AP -> SCP and SCP -> AP transfers; define the address of this...
*/
-#define BOM_SHARED_MEM (MHU_SECURE_BASE + 0x0080)
+#define BOM_SHARED_MEM SCP_COM_SHARED_MEM_BASE
#define BOM_CMD_HEADER ((bom_cmd_t *) BOM_SHARED_MEM)
#define BOM_CMD_PAYLOAD ((void *) (BOM_SHARED_MEM + sizeof(bom_cmd_t)))
@@ -181,7 +181,7 @@
BOM_CMD_HEADER->id = BOOT_CMD_DATA;
cmd_data_payload = BOM_CMD_PAYLOAD;
- cmd_data_payload->offset = (uintptr_t) image - MHU_SECURE_BASE;
+ cmd_data_payload->offset = (uintptr_t) image - ARM_TRUSTED_SRAM_BASE;
cmd_data_payload->block_size = image_size;
scp_boot_message_send(sizeof(*cmd_data_payload));
diff --git a/plat/arm/css/common/css_scpi.c b/plat/arm/css/common/css_scpi.c
index 9127259..0a4eafe 100644
--- a/plat/arm/css/common/css_scpi.c
+++ b/plat/arm/css/common/css_scpi.c
@@ -37,8 +37,8 @@
#include "css_mhu.h"
#include "css_scpi.h"
-#define SCPI_SHARED_MEM_SCP_TO_AP (MHU_SECURE_BASE + 0x0080)
-#define SCPI_SHARED_MEM_AP_TO_SCP (MHU_SECURE_BASE + 0x0180)
+#define SCPI_SHARED_MEM_SCP_TO_AP SCP_COM_SHARED_MEM_BASE
+#define SCPI_SHARED_MEM_AP_TO_SCP (SCP_COM_SHARED_MEM_BASE + 0x100)
#define SCPI_CMD_HEADER_AP_TO_SCP \
((scpi_cmd_t *) SCPI_SHARED_MEM_AP_TO_SCP)