Merge pull request #317 from vwadekar/run-bl32-on-tegra-v3
Run bl32 on tegra v3
diff --git a/docs/plat/nvidia-tegra.md b/docs/plat/nvidia-tegra.md
index 242e8db..e4f9a05 100644
--- a/docs/plat/nvidia-tegra.md
+++ b/docs/plat/nvidia-tegra.md
@@ -15,7 +15,16 @@
* plat/nvidia/tegra/common - Common code for all Tegra SoCs
* plat/nvidia/tegra/soc/txxx - Chip specific code
+Trusted OS dispatcher
+=====================
+Tegra supports multiple Trusted OS', Trusted Little Kernel (TLK) being one of
+them. In order to include the 'tlkd' dispatcher in the image, pass 'SPD=tlkd'
+on the command line while preparing a bl31 image. This allows other Trusted OS
+vendors to use the upstream code and include their dispatchers in the image
+without changing any makefiles.
+
Preparing the BL31 image to run on Tegra SoCs
===================================================
CROSS_COMPILE=<path-to-aarch64-gcc>/bin/aarch64-none-elf- make PLAT=tegra \
-TARGET_SOC=<target-soc e.g. t210> all
+TARGET_SOC=<target-soc e.g. t210> BL32=<path-to-trusted-os-binary> \
+SPD=<dispatcher e.g. tlkd> all
diff --git a/docs/optee-dispatcher.md b/docs/spd/optee-dispatcher.md
similarity index 100%
rename from docs/optee-dispatcher.md
rename to docs/spd/optee-dispatcher.md
diff --git a/docs/tlk-dispatcher.md b/docs/spd/tlk-dispatcher.md
similarity index 93%
rename from docs/tlk-dispatcher.md
rename to docs/spd/tlk-dispatcher.md
index a2212b5..890b35e 100644
--- a/docs/tlk-dispatcher.md
+++ b/docs/spd/tlk-dispatcher.md
@@ -10,10 +10,11 @@
just needs to compile, any BL32 image would do. To use TLK as the BL32, please
refer to the "Build TLK" section.
-Once a BL32 is ready, TLKD can be compiled using the following command:
+Once a BL32 is ready, TLKD can be included in the image using the following
+command:
CROSS_COMPILE=<path_to_linaro_chain>/bin/aarch64-none-elf- make NEED_BL1=0
-NEED_BL2=0 BL32=<path_to_BL32_image> PLAT=<platform> all
+NEED_BL2=0 BL32=<path_to_BL32_image> PLAT=<platform> SPD=tlkd all
_
Trusted Little Kernel (TLK)
===========================
diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c
index 628dc2a..7592903 100644
--- a/plat/nvidia/tegra/common/tegra_bl31_setup.c
+++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c
@@ -82,7 +82,7 @@
#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
#endif
-static entry_point_info_t bl33_image_ep_info;
+static entry_point_info_t bl33_image_ep_info, bl32_image_ep_info;
static plat_params_from_bl2_t plat_bl31_params_from_bl2 = {
(uint64_t)TZDRAM_SIZE, (uintptr_t)NULL
};
@@ -102,6 +102,9 @@
if (type == NON_SECURE)
return &bl33_image_ep_info;
+ if (type == SECURE)
+ return &bl32_image_ep_info;
+
return NULL;
}
@@ -134,10 +137,11 @@
plat_crash_console_init();
/*
- * Copy BL3-3 entry point information.
+ * Copy BL3-3, BL3-2 entry point information.
* They are stored in Secure RAM, in BL2's address space.
*/
bl33_image_ep_info = *from_bl2->bl33_ep_info;
+ bl32_image_ep_info = *from_bl2->bl32_ep_info;
/*
* Parse platform specific parameters - TZDRAM aperture size and
diff --git a/plat/nvidia/tegra/include/platform_def.h b/plat/nvidia/tegra/include/platform_def.h
index 6be777e..d4b0ce2 100644
--- a/plat/nvidia/tegra/include/platform_def.h
+++ b/plat/nvidia/tegra/include/platform_def.h
@@ -69,8 +69,11 @@
/*******************************************************************************
* BL31 specific defines.
******************************************************************************/
+#define BL31_SIZE 0x20000
#define BL31_BASE TZDRAM_BASE
-#define BL31_LIMIT (TZDRAM_BASE + 0x11FFF)
+#define BL31_LIMIT (TZDRAM_BASE + BL31_SIZE - 1)
+#define BL32_BASE (TZDRAM_BASE + BL31_SIZE)
+#define BL32_LIMIT TZDRAM_END
/*******************************************************************************
* Platform specific page table and MMU setup constants