commit | 68a06829a532106a72213ca5e718862e6eb44287 | [log] [tgz] |
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author | Manish Pandey <manish.pandey2@arm.com> | Fri Mar 05 10:14:03 2021 +0100 |
committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Fri Mar 05 10:14:03 2021 +0100 |
tree | e752f493b5a5d1c3122db472bf48639f8af4ed28 | |
parent | 65310d8d09aee4be7f1b8bbb0c81758b1f8319f0 [diff] | |
parent | 691b49da5123e8ac40477fd6b144614089b9bc59 [diff] |
Merge changes I76eee5c5,Ie45ab1d8,Iddcb83d3,I4425777d,I5be2837c, ... into integration * changes: drivers/gicv3: also shift eSPI register offset in GICD_OFFSET_64() drivers/gicv3: add debug log for maximum INTID of SPI and eSPI drivers/gicv3: limit SPI ID to avoid misjudgement in GICD_OFFSET() drivers/gicv3: fix logical issue for num_eints drivers/gicv3: fix potential GICD context override with ESPI enabled drivers/gicv3: use mpidr to probe GICR for current CPU