tree f921b7d842ce3a7be0e7e701f35fbea187e8dee6
parent 534ae7fa14b7d65944e61ceea5bc32818c1edd27
author Achin Gupta <achin.gupta@arm.com> 1407190390 +0100
committer Achin Gupta <achin.gupta@arm.com> 1408094510 +0100

Unmask SError interrupt and clear SCR_EL3.EA bit

This patch disables routing of external aborts from lower exception levels to
EL3 and ensures that a SError interrupt generated as a result of execution in
EL3 is taken locally instead of a lower exception level.

The SError interrupt is enabled in the TSP code only when the operation has not
been directly initiated by the normal world. This is to prevent the possibility
of an asynchronous external abort which originated in normal world from being
taken when execution is in S-EL1.

Fixes ARM-software/tf-issues#153

Change-Id: I157b996c75996d12fd86d27e98bc73dd8bce6cd5