commit eb6a467b3fa5c2efa9f85f4fba6bb317b0564fc3
author Gabriel Fernandez <gabriel.fernandez@foss.st.com> Wed May 07 15:45:04 2025 +0200
committer Gabriel Fernandez <gabriel.fernandez@foss.st.com> Mon Jun 02 15:08:52 2025 +0200
tree df8e120ecb621a6b0cbe60bae153215b989336c8
parent d8f3b15ccd950bbcb65e3ac724c79e14dce01a4c

feat(stm32mp25): add RCC register to display all IWDG flags

Add a new define RCC_C1BOOTRSTSCLRR_IWDGXSYSRSTF to check all IWDG flags.

Change-Id: Id48671ae935e3100d4c42bc341d770f702d661de
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>

include/drivers/st/stm32mp25_rcc.h

diff --git a/include/drivers/st/stm32mp25_rcc.h b/include/drivers/st/stm32mp25_rcc.h
index d5d228c..752d3c3 100644
--- a/include/drivers/st/stm32mp25_rcc.h
+++ b/include/drivers/st/stm32mp25_rcc.h
@@ -2308,6 +2308,12 @@
 #define RCC_C1BOOTRSTSCLRR_D1STBYRSTF		BIT(22)
 #define RCC_C1BOOTRSTSCLRR_D2STBYRSTF		BIT(23)
 
+#define RCC_C1BOOTRSTSCLRR_IWDGXSYSRSTF (RCC_C1BOOTRSTSCLRR_IWDG1SYSRSTF | \
+					 RCC_C1BOOTRSTSCLRR_IWDG2SYSRSTF | \
+					 RCC_C1BOOTRSTSCLRR_IWDG3SYSRSTF | \
+					 RCC_C1BOOTRSTSCLRR_IWDG4SYSRSTF | \
+					 RCC_C1BOOTRSTSCLRR_IWDG5SYSRSTF)
+
 /* RCC_C2BOOTRSTSSETR register fields */
 #define RCC_C2BOOTRSTSSETR_PORRSTF		BIT(0)
 #define RCC_C2BOOTRSTSSETR_BORRSTF		BIT(1)