Merge pull request #1081 from masahir0y/uniphier
uniphier: fix-up for PXs3 SoC
diff --git a/docs/porting-guide.rst b/docs/porting-guide.rst
index bf8dea7..c8d61ed 100644
--- a/docs/porting-guide.rst
+++ b/docs/porting-guide.rst
@@ -1997,7 +1997,7 @@
together form the platform interface for the PSCI topology framework.
Function : plat\_setup\_psci\_ops() [mandatory]
------------------------------------------------
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
::
@@ -2024,7 +2024,7 @@
structure instead of providing an empty implementation.
plat\_psci\_ops.cpu\_standby()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+..............................
Perform the platform-specific actions to enter the standby state for a cpu
indicated by the passed argument. This provides a fast path for CPU standby
@@ -2037,14 +2037,14 @@
state by a normal interrupt. The generic code expects the handler to succeed.
plat\_psci\_ops.pwr\_domain\_on()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.................................
Perform the platform specific actions to power on a CPU, specified
by the ``MPIDR`` (first argument). The generic code expects the platform to
return PSCI\_E\_SUCCESS on success or PSCI\_E\_INTERN\_FAIL for any failure.
plat\_psci\_ops.pwr\_domain\_off()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+..................................
Perform the platform specific actions to prepare to power off the calling CPU
and its higher parent power domain levels as indicated by the ``target_state``
@@ -2061,7 +2061,7 @@
coordination. The generic code expects the handler to succeed.
plat\_psci\_ops.pwr\_domain\_suspend\_pwrdown\_early() [optional]
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.................................................................
This optional function may be used as a performance optimization to replace
or complement pwr_domain_suspend() on some platforms. Its calling semantics
@@ -2078,7 +2078,7 @@
moving platform specific actions to this function.
plat\_psci\_ops.pwr\_domain\_suspend()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+......................................
Perform the platform specific actions to prepare to suspend the calling
CPU and its higher parent power domain levels as indicated by the
@@ -2100,7 +2100,7 @@
``pwr_domain_suspend_finish()``).
plat\_psci\_ops.pwr\_domain\_pwr\_down\_wfi()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.............................................
This is an optional function and, if implemented, is expected to perform
platform specific actions including the ``wfi`` invocation which allows the
@@ -2117,7 +2117,7 @@
implementation invokes ``psci_power_down_wfi()`` for power down.
plat\_psci\_ops.pwr\_domain\_on\_finish()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.........................................
This function is called by the PSCI implementation after the calling CPU is
powered on and released from reset in response to an earlier PSCI ``CPU_ON`` call.
@@ -2131,7 +2131,7 @@
low power states. The generic code expects the handler to succeed.
plat\_psci\_ops.pwr\_domain\_suspend\_finish()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+..............................................
This function is called by the PSCI implementation after the calling CPU is
powered on and released from reset in response to an asynchronous wakeup
@@ -2145,21 +2145,21 @@
to succeed.
plat\_psci\_ops.system\_off()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.............................
This function is called by PSCI implementation in response to a ``SYSTEM_OFF``
call. It performs the platform-specific system poweroff sequence after
notifying the Secure Payload Dispatcher.
plat\_psci\_ops.system\_reset()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+...............................
This function is called by PSCI implementation in response to a ``SYSTEM_RESET``
call. It performs the platform-specific system reset sequence after
notifying the Secure Payload Dispatcher.
plat\_psci\_ops.validate\_power\_state()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+........................................
This function is called by the PSCI implementation during the ``CPU_SUSPEND``
call to validate the ``power_state`` parameter of the PSCI API and if valid,
@@ -2169,7 +2169,7 @@
normal world PSCI client.
plat\_psci\_ops.validate\_ns\_entrypoint()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+..........................................
This function is called by the PSCI implementation during the ``CPU_SUSPEND``,
``SYSTEM_SUSPEND`` and ``CPU_ON`` calls to validate the non-secure ``entry_point``
@@ -2178,7 +2178,7 @@
propagated back to the normal world PSCI client.
plat\_psci\_ops.get\_sys\_suspend\_power\_state()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+.................................................
This function is called by the PSCI implementation during the ``SYSTEM_SUSPEND``
call to get the ``req_state`` parameter from platform which encodes the power
@@ -2188,7 +2188,7 @@
enter system suspend.
plat\_psci\_ops.get\_pwr\_lvl\_state\_idx()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+...........................................
This is an optional function and, if implemented, is invoked by the PSCI
implementation to convert the ``local_state`` (first argument) at a specified
@@ -2199,7 +2199,7 @@
local power states.
plat\_psci\_ops.translate\_power\_state\_by\_mpidr()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+....................................................
This is an optional function and, if implemented, verifies the ``power_state``
(second argument) parameter of the PSCI API corresponding to a target power
@@ -2219,7 +2219,7 @@
APIs as described in Section 5.18 of `PSCI`_.
plat\_psci\_ops.get\_node\_hw\_state()
-~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+......................................
This is an optional function. If implemented this function is intended to return
the power state of a node (identified by the first parameter, the ``MPIDR``) in
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 106cd74..d44e278 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -168,10 +168,12 @@
ARM_NS_DRAM1_SIZE, \
MT_MEMORY | MT_RW | MT_NS)
+#ifdef SPD_tspd
#define ARM_MAP_TSP_SEC_MEM MAP_REGION_FLAT( \
TSP_SEC_MEM_BASE, \
TSP_SEC_MEM_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE)
+#endif
#if ARM_BL31_IN_DRAM
#define ARM_MAP_BL31_SEC_DRAM MAP_REGION_FLAT( \
diff --git a/plat/arm/board/common/board_css_common.c b/plat/arm/board/common/board_css_common.c
index 139a3af..2495e28 100644
--- a/plat/arm/board/common/board_css_common.c
+++ b/plat/arm/board/common/board_css_common.c
@@ -33,7 +33,9 @@
CSS_MAP_DEVICE,
SOC_CSS_MAP_DEVICE,
ARM_MAP_NS_DRAM1,
+#ifdef SPD_tspd
ARM_MAP_TSP_SEC_MEM,
+#endif
#ifdef SPD_opteed
ARM_OPTEE_PAGEABLE_LOAD_MEM,
#endif
diff --git a/plat/arm/board/fvp/fvp_common.c b/plat/arm/board/fvp/fvp_common.c
index d97a049..e232745 100644
--- a/plat/arm/board/fvp/fvp_common.c
+++ b/plat/arm/board/fvp/fvp_common.c
@@ -79,7 +79,9 @@
MAP_DEVICE0,
MAP_DEVICE1,
ARM_MAP_NS_DRAM1,
+#ifdef SPD_tspd
ARM_MAP_TSP_SEC_MEM,
+#endif
#if TRUSTED_BOARD_BOOT
/* To access the Root of Trust Public Key registers. */
MAP_DEVICE2,
diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h
index 9452883..873c569 100644
--- a/plat/arm/board/juno/include/platform_def.h
+++ b/plat/arm/board/juno/include/platform_def.h
@@ -122,6 +122,12 @@
*/
#define PLAT_ARM_MAX_BL31_SIZE 0x1D000
+/*
+ * Since free SRAM space is scant, enable the ASSERTION message size
+ * optimization by fixing the PLAT_LOG_LEVEL_ASSERT to LOG_LEVEL_INFO (40).
+ */
+#define PLAT_LOG_LEVEL_ASSERT 40
+
#endif /* ARM_BOARD_OPTIMISE_MEM */
/* CCI related constants */
diff --git a/plat/hisilicon/hikey/hisi_pwrc.c b/plat/hisilicon/hikey/hisi_pwrc.c
index ade408d..8e9d1fc 100644
--- a/plat/hisilicon/hikey/hisi_pwrc.c
+++ b/plat/hisilicon/hikey/hisi_pwrc.c
@@ -75,8 +75,13 @@
pm_asm_code_end - pm_asm_code);
reg = mmio_read_32(AO_SC_SYS_CTRL1);
+ /* Remap SRAM address for ACPU */
reg |= AO_SC_SYS_CTRL1_REMAP_SRAM_AARM |
AO_SC_SYS_CTRL1_REMAP_SRAM_AARM_MSK;
+
+ /* Enable reset signal for watchdog */
+ reg |= AO_SC_SYS_CTRL1_AARM_WD_RST_CFG |
+ AO_SC_SYS_CTRL1_AARM_WD_RST_CFG_MSK;
mmio_write_32(AO_SC_SYS_CTRL1, reg);
return 0;