Make enablement of the MMU more flexible
This patch adds a 'flags' parameter to each exception level specific function
responsible for enabling the MMU. At present only a single flag which indicates
whether the data cache should also be enabled is implemented. Subsequent patches
will use this flag when enabling the MMU in the warm boot paths.
Change-Id: I0eafae1e678c9ecc604e680851093f1680e9cefa
diff --git a/include/lib/aarch64/xlat_tables.h b/include/lib/aarch64/xlat_tables.h
index 8e0adc7..2d4a211 100644
--- a/include/lib/aarch64/xlat_tables.h
+++ b/include/lib/aarch64/xlat_tables.h
@@ -31,6 +31,14 @@
#ifndef __XLAT_TABLES_H__
#define __XLAT_TABLES_H__
+
+/*
+ * Flags to override default values used to program system registers while
+ * enabling the MMU.
+ */
+#define DISABLE_DCACHE (1 << 0)
+
+#ifndef __ASSEMBLY__
#include <stdint.h>
/*
@@ -67,7 +75,8 @@
void init_xlat_tables(void);
-void enable_mmu_el1(void);
-void enable_mmu_el3(void);
+void enable_mmu_el1(uint32_t flags);
+void enable_mmu_el3(uint32_t flags);
+#endif /*__ASSEMBLY__*/
#endif /* __XLAT_TABLES_H__ */
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index 1eeaac2..4b73a09 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -180,7 +180,7 @@
/*******************************************************************************
* Optional BL3-1 functions (may be overridden)
******************************************************************************/
-void bl31_plat_enable_mmu(void);
+void bl31_plat_enable_mmu(uint32_t flags);
/*******************************************************************************
* Mandatory BL3-2 functions (only if platform contains a BL3-2)
@@ -190,6 +190,6 @@
/*******************************************************************************
* Optional BL3-2 functions (may be overridden)
******************************************************************************/
-void bl32_plat_enable_mmu(void);
+void bl32_plat_enable_mmu(uint32_t flags);
#endif /* __PLATFORM_H__ */
diff --git a/lib/aarch64/xlat_tables.c b/lib/aarch64/xlat_tables.c
index f1d658d..d494112 100644
--- a/lib/aarch64/xlat_tables.c
+++ b/lib/aarch64/xlat_tables.c
@@ -292,7 +292,7 @@
* exception level
******************************************************************************/
#define DEFINE_ENABLE_MMU_EL(_el, _tcr_extra, _tlbi_fct) \
- void enable_mmu_el##_el(void) \
+ void enable_mmu_el##_el(uint32_t flags) \
{ \
uint64_t mair, tcr, ttbr; \
uint32_t sctlr; \
@@ -330,7 +330,13 @@
\
sctlr = read_sctlr_el##_el(); \
sctlr |= SCTLR_WXN_BIT | SCTLR_M_BIT | SCTLR_I_BIT; \
- sctlr |= SCTLR_A_BIT | SCTLR_C_BIT; \
+ sctlr |= SCTLR_A_BIT; \
+ \
+ if (flags & DISABLE_DCACHE) \
+ sctlr &= ~SCTLR_C_BIT; \
+ else \
+ sctlr |= SCTLR_C_BIT; \
+ \
write_sctlr_el##_el(sctlr); \
\
/* Ensure the MMU enable takes effect immediately */ \
diff --git a/plat/common/aarch64/plat_common.c b/plat/common/aarch64/plat_common.c
index 94b9dfd..90574fd 100644
--- a/plat/common/aarch64/plat_common.c
+++ b/plat/common/aarch64/plat_common.c
@@ -38,12 +38,12 @@
#pragma weak bl31_plat_enable_mmu
#pragma weak bl32_plat_enable_mmu
-void bl31_plat_enable_mmu(void)
+void bl31_plat_enable_mmu(uint32_t flags)
{
- enable_mmu_el3();
+ enable_mmu_el3(flags);
}
-void bl32_plat_enable_mmu(void)
+void bl32_plat_enable_mmu(uint32_t flags)
{
- enable_mmu_el1();
+ enable_mmu_el1(flags);
}
diff --git a/plat/fvp/aarch64/fvp_common.c b/plat/fvp/aarch64/fvp_common.c
index 3fe3a21..3926239 100644
--- a/plat/fvp/aarch64/fvp_common.c
+++ b/plat/fvp/aarch64/fvp_common.c
@@ -119,7 +119,7 @@
mmap_add(fvp_mmap); \
init_xlat_tables(); \
\
- enable_mmu_el##_el(); \
+ enable_mmu_el##_el(0); \
}
/* Define EL1 and EL3 variants of the function initialising the MMU */
diff --git a/services/std_svc/psci/psci_afflvl_on.c b/services/std_svc/psci/psci_afflvl_on.c
index d620172..1551cfe 100644
--- a/services/std_svc/psci/psci_afflvl_on.c
+++ b/services/std_svc/psci/psci_afflvl_on.c
@@ -361,7 +361,7 @@
/*
* Arch. management: Turn on mmu & restore architectural state
*/
- bl31_plat_enable_mmu();
+ bl31_plat_enable_mmu(0);
/*
* All the platform specific actions for turning this cpu