plat/stm32mp1: sp_min relies on etzpc driver
Use ETZPC driver to configure secure aware interfaces to assign
them to non-secure world. Sp_min also configures BootROM resources
and SYSRAM to assign both to secure world only.
Define stm32mp15 SoC identifiers for the platform specific DECPROT
instances.
Change-Id: I3bec9f47b04bcba3929e4df886ddb1d5ff843089
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
diff --git a/plat/st/stm32mp1/sp_min/sp_min-stm32mp1.mk b/plat/st/stm32mp1/sp_min/sp_min-stm32mp1.mk
index 4188cc5..180620e 100644
--- a/plat/st/stm32mp1/sp_min/sp_min-stm32mp1.mk
+++ b/plat/st/stm32mp1/sp_min/sp_min-stm32mp1.mk
@@ -6,10 +6,12 @@
SP_MIN_WITH_SECURE_FIQ := 1
-BL32_SOURCES += plat/common/aarch32/platform_mp_stack.S \
+BL32_SOURCES += drivers/st/etzpc/etzpc.c \
+ plat/common/aarch32/platform_mp_stack.S \
plat/st/stm32mp1/sp_min/sp_min_setup.c \
plat/st/stm32mp1/stm32mp1_pm.c \
plat/st/stm32mp1/stm32mp1_topology.c
+
# Generic GIC v2
BL32_SOURCES += drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_helpers.c \
diff --git a/plat/st/stm32mp1/sp_min/sp_min_setup.c b/plat/st/stm32mp1/sp_min/sp_min_setup.c
index 4e74c27..e1799ed 100644
--- a/plat/st/stm32mp1/sp_min/sp_min_setup.c
+++ b/plat/st/stm32mp1/sp_min/sp_min_setup.c
@@ -17,6 +17,7 @@
#include <drivers/arm/tzc400.h>
#include <drivers/generic_delay_timer.h>
#include <drivers/st/bsec.h>
+#include <drivers/st/etzpc.h>
#include <drivers/st/stm32_console.h>
#include <drivers/st/stm32_gpio.h>
#include <drivers/st/stm32_iwdg.h>
@@ -76,6 +77,26 @@
return next_image_info;
}
+#define TZMA1_SECURE_RANGE STM32MP1_ETZPC_TZMA_ALL_SECURE
+#define TZMA0_SECURE_RANGE STM32MP1_ETZPC_TZMA_ALL_SECURE
+
+static void stm32mp1_etzpc_early_setup(void)
+{
+ unsigned int n;
+
+ if (etzpc_init() != 0) {
+ panic();
+ }
+
+ etzpc_configure_tzma(STM32MP1_ETZPC_TZMA_ROM, TZMA0_SECURE_RANGE);
+ etzpc_configure_tzma(STM32MP1_ETZPC_TZMA_SYSRAM, TZMA1_SECURE_RANGE);
+
+ /* Release security on all shared resources */
+ for (n = 0; n < STM32MP1_ETZPC_SEC_ID_LIMIT; n++) {
+ etzpc_configure_decprot(n, ETZPC_DECPROT_NS_RW);
+ }
+}
+
/*******************************************************************************
* Perform any BL32 specific platform actions.
******************************************************************************/
@@ -144,6 +165,8 @@
#endif
console_set_scope(&console, console_flags);
}
+
+ stm32mp1_etzpc_early_setup();
}
/*******************************************************************************
@@ -158,11 +181,6 @@
stm32mp1_gic_init();
- /* Unlock ETZPC securable peripherals */
-#define STM32MP1_ETZPC_BASE 0x5C007000U
-#define ETZPC_DECPROT0 0x010U
- mmio_write_32(STM32MP1_ETZPC_BASE + ETZPC_DECPROT0, 0xFFFFFFFF);
-
/* Set GPIO bank Z as non secure */
for (uint32_t pin = 0U; pin < STM32MP_GPIOZ_PIN_MAX_COUNT; pin++) {
set_gpio_secure_cfg(GPIO_BANK_Z, pin, false);