tree 097e408dd7978adb00931d146ef6db3fa8638495
parent 61ef4f91e2b2bef0129646887695f0a32e440ee8
author Roberto Vargas <roberto.vargas@arm.com> 1534166263 +0100
committer Roberto Vargas <roberto.vargas@arm.com> 1534166430 +0100

cci: Use dsb to wait before reading status register

The CCI500 TRM explicitily requires completion of the write
operation before the read operation, and it is not guaranteed
by dmb but it is dsb.

Change-Id: Ieeaa0d1a4b8fcb87108dea9b6de03d9c8a150829
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>