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git01.mediatek.com / filogic / atf / e901bacb27f8afc2da4e2b857ad7114010e2b73f / . / plat / xilinx / versal_net
tree: f3ddad176f66e66b6c8eb16d35fcf91c08d1b34e [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. tsp/
  5. bl31_versal_net_setup.c
  6. plat_psci.c
  7. plat_psci_pm.c
  8. plat_topology.c
  9. platform.mk
  10. sip_svc_setup.c
  11. versal_net_ipi.c