rcar_gen3: drivers: qos: H3: Drop extra level of nesting
The extra level of nesting is not necessary, drop it.
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I7b55a6fa53145ff0427e05656234917f486031df
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
index bd1865d..2001ad9 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v11.c
@@ -235,19 +235,16 @@
io_write_32(0xFFC51800, 0x00000001U);
/* CCI bus Leaf setting */
- {
+ uint32_t modemr = io_read_32(RCAR_MODEMR);
- uint32_t modemr = io_read_32(RCAR_MODEMR);
-
- modemr &= MODEMR_BOOT_CPU_MASK;
+ modemr &= MODEMR_BOOT_CPU_MASK;
- if ((modemr == MODEMR_BOOT_CPU_CA57) ||
- (modemr == MODEMR_BOOT_CPU_CA53)) {
- io_write_32(0xF1300800, 0x00000001U);
- io_write_32(0xF1340800, 0x00000001U);
- io_write_32(0xF1380800, 0x00000001U);
- io_write_32(0xF13C0800, 0x00000001U);
- }
+ if ((modemr == MODEMR_BOOT_CPU_CA57) ||
+ (modemr == MODEMR_BOOT_CPU_CA53)) {
+ io_write_32(0xF1300800, 0x00000001U);
+ io_write_32(0xF1340800, 0x00000001U);
+ io_write_32(0xF1380800, 0x00000001U);
+ io_write_32(0xF13C0800, 0x00000001U);
}
/* Resource Alloc start */
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
index 7592caa..2f9c219 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v20.c
@@ -187,30 +187,28 @@
io_write_32(QOSCTRL_REF_ARS, 0x00330000U);
#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
- {
- uint32_t i;
+ uint32_t i;
- for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
- io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
- io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
- }
- for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
- io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
- io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
- }
+ for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+ io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+ io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+ }
+ for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+ io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+ io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
+ }
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
- for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
- io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
- qoswt_fix[i]);
- io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
- qoswt_fix[i]);
- }
- for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
- io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
- io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
- }
-#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
+ for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
+ io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
+ qoswt_fix[i]);
+ io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
+ qoswt_fix[i]);
}
+ for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
+ io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+ io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
+ }
+#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
/* 3DG bus Leaf setting */
io_write_32(GPU_ACT0, 0x00000000U);
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
index 1261a43..c71e0e7 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3_v30.c
@@ -194,30 +194,28 @@
io_write_32(QOSCTRL_REF_ARS,
((QOSCTRL_REF_ARS_ARBSTOPCYCLE_H3_30 << 16)));
- {
- uint32_t i;
+ uint32_t i;
- for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
- io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
- io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
- }
- for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
- io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
- io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
- }
+ for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+ io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+ io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+ }
+ for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+ io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+ io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
+ }
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
- for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
- io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
- qoswt_fix[i]);
- io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
- qoswt_fix[i]);
- }
- for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
- io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
- io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
- }
-#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
+ for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
+ io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
+ qoswt_fix[i]);
+ io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
+ qoswt_fix[i]);
}
+ for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
+ io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+ io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
+ }
+#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
/* AXI setting */
io_write_32(AXI_MMCR, 0x00010008U);
diff --git a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
index 0557b79..906d158 100644
--- a/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
+++ b/drivers/staging/renesas/rcar/qos/H3/qos_init_h3n_v30.c
@@ -188,30 +188,28 @@
io_write_32(QOSCTRL_REF_ARS,
((QOSCTRL_REF_ARS_ARBSTOPCYCLE_H3N << 16)));
- {
- uint32_t i;
+ uint32_t i;
- for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
- io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
- io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
- }
- for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
- io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
- io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
- }
+ for (i = 0U; i < ARRAY_SIZE(mstat_fix); i++) {
+ io_write_64(QOSBW_FIX_QOS_BANK0 + i * 8, mstat_fix[i]);
+ io_write_64(QOSBW_FIX_QOS_BANK1 + i * 8, mstat_fix[i]);
+ }
+ for (i = 0U; i < ARRAY_SIZE(mstat_be); i++) {
+ io_write_64(QOSBW_BE_QOS_BANK0 + i * 8, mstat_be[i]);
+ io_write_64(QOSBW_BE_QOS_BANK1 + i * 8, mstat_be[i]);
+ }
#if RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE
- for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
- io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
- qoswt_fix[i]);
- io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
- qoswt_fix[i]);
- }
- for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
- io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
- io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
- }
-#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
+ for (i = 0U; i < ARRAY_SIZE(qoswt_fix); i++) {
+ io_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8,
+ qoswt_fix[i]);
+ io_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8,
+ qoswt_fix[i]);
}
+ for (i = 0U; i < ARRAY_SIZE(qoswt_be); i++) {
+ io_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8, qoswt_be[i]);
+ io_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8, qoswt_be[i]);
+ }
+#endif /* RCAR_REWT_TRAINING != RCAR_REWT_TRAINING_DISABLE */
/* AXI setting */
io_write_32(AXI_MMCR, 0x00010008U);