Tegra: add platform specific 'runtime_setup' handler
Tegra SoCs would like the flexibility to perform chip specific actions
before we complete cold boot. This patch introduces a platform specific
'runtime_setup' handler to provide that flexibility.
Change-Id: I13b2489f631f775cae6f92acf51a240cd036ef11
Signed-off-by: Kalyani Chidambaram Vaidyanathan <kalyanic@nvidia.com>
diff --git a/plat/nvidia/tegra/soc/t186/plat_setup.c b/plat/nvidia/tegra/soc/t186/plat_setup.c
index ab374a4..d6d090a 100644
--- a/plat/nvidia/tegra/soc/t186/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t186/plat_setup.c
@@ -27,6 +27,7 @@
#include <mce.h>
#include <memctrl.h>
+#include <smmu.h>
#include <tegra_def.h>
#include <tegra_platform.h>
#include <tegra_private.h>
@@ -363,3 +364,34 @@
{
return true;
}
+/*******************************************************************************
+ * Platform specific runtime setup.
+ ******************************************************************************/
+void plat_runtime_setup(void)
+{
+ /*
+ * During cold boot, it is observed that the arbitration
+ * bit is set in the Memory controller leading to false
+ * error interrupts in the non-secure world. To avoid
+ * this, clean the interrupt status register before
+ * booting into the non-secure world
+ */
+ tegra_memctrl_clear_pending_interrupts();
+
+ /*
+ * During boot, USB3 and flash media (SDMMC/SATA) devices need
+ * access to IRAM. Because these clients connect to the MC and
+ * do not have a direct path to the IRAM, the MC implements AHB
+ * redirection during boot to allow path to IRAM. In this mode
+ * accesses to a programmed memory address aperture are directed
+ * to the AHB bus, allowing access to the IRAM. This mode must be
+ * disabled before we jump to the non-secure world.
+ */
+ tegra_memctrl_disable_ahb_redirection();
+
+ /*
+ * Verify the integrity of the previously configured SMMU(s)
+ * settings
+ */
+ tegra_smmu_verify();
+}