diff --git a/plat/fvp/bl2_plat_setup.c b/plat/fvp/bl2_plat_setup.c
index 672f096..b945db9 100644
--- a/plat/fvp/bl2_plat_setup.c
+++ b/plat/fvp/bl2_plat_setup.c
@@ -98,11 +98,13 @@
 {
 	bl2_to_bl31_params_mem_t *bl31_params_mem;
 
+#if TSP_RAM_LOCATION_ID == TSP_IN_TZDRAM
 	/*
 	 * Ensure that the secure DRAM memory used for passing BL31 arguments
 	 * does not overlap with the BL32_BASE.
 	 */
 	assert(BL32_BASE > PARAMS_BASE + sizeof(bl2_to_bl31_params_mem_t));
+#endif
 
 	/*
 	 * Allocate the memory for all the arguments that needs to
@@ -265,8 +267,6 @@
 {
 	/*
 	 * Populate the extents of memory available for loading BL32.
-	 * TODO: We are temporarily executing BL2 from TZDRAM;
-	 * will eventually move to Trusted SRAM
 	 */
 	bl32_meminfo->total_base = BL32_BASE;
 	bl32_meminfo->free_base = BL32_BASE;
diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h
index 07c79d9..981bc98 100644
--- a/plat/fvp/platform.h
+++ b/plat/fvp/platform.h
@@ -238,20 +238,35 @@
 /*******************************************************************************
  * BL2 specific defines.
  ******************************************************************************/
-#define BL2_BASE			0x0402D000
+#define BL2_BASE			(TZRAM_BASE + TZRAM_SIZE - 0xc000)
 
 /*******************************************************************************
  * BL31 specific defines.
  ******************************************************************************/
-#define BL31_BASE			0x0400C000
+#define BL31_BASE			(TZRAM_BASE + 0x6000)
 
 /*******************************************************************************
  * BL32 specific defines.
  ******************************************************************************/
-#define TSP_SEC_MEM_BASE		TZDRAM_BASE
-#define TSP_SEC_MEM_SIZE		TZDRAM_SIZE
-#define BL32_BASE			(TZDRAM_BASE + 0x2000)
-#define BL32_LIMIT			(TZDRAM_BASE + (1 << 21))
+/*
+ * On FVP, the TSP can execute either from Trusted SRAM or Trusted DRAM.
+ */
+#define TSP_IN_TZRAM			0
+#define TSP_IN_TZDRAM			1
+
+#if TSP_RAM_LOCATION_ID == TSP_IN_TZRAM
+# define TSP_SEC_MEM_BASE		TZRAM_BASE
+# define TSP_SEC_MEM_SIZE		TZRAM_SIZE
+# define BL32_BASE			(TZRAM_BASE + TZRAM_SIZE - 0x1c000)
+# define BL32_LIMIT			BL2_BASE
+#elif TSP_RAM_LOCATION_ID == TSP_IN_TZDRAM
+# define TSP_SEC_MEM_BASE		TZDRAM_BASE
+# define TSP_SEC_MEM_SIZE		TZDRAM_SIZE
+# define BL32_BASE			(TZDRAM_BASE + 0x2000)
+# define BL32_LIMIT			(TZDRAM_BASE + (1 << 21))
+#else
+# error "Unsupported TSP_RAM_LOCATION_ID value"
+#endif
 
 /*******************************************************************************
  * Platform specific page table and MMU setup constants
diff --git a/plat/fvp/platform.mk b/plat/fvp/platform.mk
index 4de001b..82bafed 100644
--- a/plat/fvp/platform.mk
+++ b/plat/fvp/platform.mk
@@ -28,6 +28,21 @@
 # POSSIBILITY OF SUCH DAMAGE.
 #
 
+# On FVP, the TSP can execute either from Trusted SRAM or Trusted DRAM.
+# Trusted SRAM is the default.
+TSP_RAM_LOCATION	:=	tsram
+
+ifeq (${TSP_RAM_LOCATION}, tsram)
+  TSP_RAM_LOCATION_ID := TSP_IN_TZRAM
+else ifeq (${TSP_RAM_LOCATION}, tdram)
+  TSP_RAM_LOCATION_ID := TSP_IN_TZDRAM
+else
+  $(error "Unsupported TSP_RAM_LOCATION value")
+endif
+
+# Process TSP_RAM_LOCATION_ID flag
+$(eval $(call add_define,TSP_RAM_LOCATION_ID))
+
 PLAT_INCLUDES		:=	-Iplat/fvp/include/
 
 PLAT_BL_COMMON_SOURCES	:=	drivers/arm/pl011/pl011.c			\