Merge changes from topic "mmc_device_info" into integration
* changes:
plat/st: do not keep mmc_device_info in stack
plat/intel: do not keep mmc_device_info in stack
plat/hisilicon: do not keep mmc_device_info in stack
diff --git a/plat/hisilicon/hikey/hikey_bl1_setup.c b/plat/hisilicon/hikey/hikey_bl1_setup.c
index 86e4fd6..01c48ec 100644
--- a/plat/hisilicon/hikey/hikey_bl1_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl1_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -27,6 +27,7 @@
/* Data structure which holds the extents of the trusted RAM for BL1 */
static meminfo_t bl1_tzram_layout;
static console_t console;
+static struct mmc_device_info mmc_info;
enum {
BOOT_NORMAL = 0,
@@ -78,7 +79,6 @@
void bl1_platform_setup(void)
{
dw_mmc_params_t params;
- struct mmc_device_info info;
assert((HIKEY_BL1_MMC_DESC_BASE >= SRAM_BASE) &&
((SRAM_BASE + SRAM_SIZE) >=
@@ -99,8 +99,8 @@
params.clk_rate = 24 * 1000 * 1000;
params.bus_width = MMC_BUS_WIDTH_8;
params.flags = MMC_FLAG_CMD23;
- info.mmc_dev_type = MMC_IS_EMMC;
- dw_mmc_init(¶ms, &info);
+ mmc_info.mmc_dev_type = MMC_IS_EMMC;
+ dw_mmc_init(¶ms, &mmc_info);
hikey_io_setup();
}
diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c
index feb7f8a..a90f12c 100644
--- a/plat/hisilicon/hikey/hikey_bl2_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl2_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -33,6 +33,7 @@
static meminfo_t bl2_el3_tzram_layout;
static console_t console;
+static struct mmc_device_info mmc_info;
enum {
BOOT_MODE_RECOVERY = 0,
@@ -290,7 +291,6 @@
void bl2_platform_setup(void)
{
dw_mmc_params_t params;
- struct mmc_device_info info;
hikey_sp804_init();
hikey_gpio_init();
@@ -322,8 +322,8 @@
params.clk_rate = 24 * 1000 * 1000;
params.bus_width = MMC_BUS_WIDTH_8;
params.flags = MMC_FLAG_CMD23;
- info.mmc_dev_type = MMC_IS_EMMC;
- dw_mmc_init(¶ms, &info);
+ mmc_info.mmc_dev_type = MMC_IS_EMMC;
+ dw_mmc_init(¶ms, &mmc_info);
hikey_io_setup();
}
diff --git a/plat/hisilicon/poplar/bl1_plat_setup.c b/plat/hisilicon/poplar/bl1_plat_setup.c
index 047ba62..acc1f0e 100644
--- a/plat/hisilicon/poplar/bl1_plat_setup.c
+++ b/plat/hisilicon/poplar/bl1_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -30,6 +30,10 @@
static meminfo_t bl2_tzram_layout;
static console_t console;
+#if !POPLAR_RECOVERY
+static struct mmc_device_info mmc_info;
+#endif
+
/*
* Cannot use default weak implementation in bl1_main.c because BL1 RW data is
* not at the top of the secure memory.
@@ -90,7 +94,6 @@
{
int i;
#if !POPLAR_RECOVERY
- struct mmc_device_info info;
dw_mmc_params_t params = EMMC_INIT_PARAMS(POPLAR_EMMC_DESC_BASE);
#endif
@@ -103,8 +106,8 @@
#if !POPLAR_RECOVERY
/* SoC-specific emmc register are initialized/configured by bootrom */
INFO("BL1: initializing emmc\n");
- info.mmc_dev_type = MMC_IS_EMMC;
- dw_mmc_init(¶ms, &info);
+ mmc_info.mmc_dev_type = MMC_IS_EMMC;
+ dw_mmc_init(¶ms, &mmc_info);
#endif
plat_io_setup();
diff --git a/plat/hisilicon/poplar/bl2_plat_setup.c b/plat/hisilicon/poplar/bl2_plat_setup.c
index 482935c..ee46772 100644
--- a/plat/hisilicon/poplar/bl2_plat_setup.c
+++ b/plat/hisilicon/poplar/bl2_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -26,6 +26,9 @@
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
static console_t console;
+#if !POPLAR_RECOVERY
+static struct mmc_device_info mmc_info;
+#endif
/*******************************************************************************
* Transfer SCP_BL2 from Trusted RAM using the SCP Download protocol.
@@ -171,8 +174,6 @@
{
struct meminfo *mem_layout = (struct meminfo *)arg1;
#if !POPLAR_RECOVERY
- struct mmc_device_info info;
-
dw_mmc_params_t params = EMMC_INIT_PARAMS(POPLAR_EMMC_DESC_BASE);
#endif
@@ -187,8 +188,8 @@
#if !POPLAR_RECOVERY
/* SoC-specific emmc register are initialized/configured by bootrom */
INFO("BL2: initializing emmc\n");
- info.mmc_dev_type = MMC_IS_EMMC;
- dw_mmc_init(¶ms, &info);
+ mmc_info.mmc_dev_type = MMC_IS_EMMC;
+ dw_mmc_init(¶ms, &mmc_info);
#endif
plat_io_setup();
diff --git a/plat/intel/soc/agilex/bl2_plat_setup.c b/plat/intel/soc/agilex/bl2_plat_setup.c
index f002947..b6b3e16 100644
--- a/plat/intel/soc/agilex/bl2_plat_setup.c
+++ b/plat/intel/soc/agilex/bl2_plat_setup.c
@@ -1,6 +1,6 @@
/*
- * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
- * Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
+ * Copyright (c) 2019-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2019-2021, Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -29,6 +29,7 @@
#include "socfpga_system_manager.h"
#include "wdt/watchdog.h"
+static struct mmc_device_info mmc_info;
const mmap_region_t agilex_plat_mmap[] = {
MAP_REGION_FLAT(DRAM_BASE, DRAM_SIZE,
@@ -87,7 +88,6 @@
void bl2_el3_plat_arch_setup(void)
{
- struct mmc_device_info info;
const mmap_region_t bl_regions[] = {
MAP_REGION_FLAT(BL2_BASE, BL2_END - BL2_BASE,
MT_MEMORY | MT_RW | MT_SECURE),
@@ -110,12 +110,12 @@
dw_mmc_params_t params = EMMC_INIT_PARAMS(0x100000, get_mmc_clk());
- info.mmc_dev_type = MMC_IS_SD;
- info.ocr_voltage = OCR_3_3_3_4 | OCR_3_2_3_3;
+ mmc_info.mmc_dev_type = MMC_IS_SD;
+ mmc_info.ocr_voltage = OCR_3_3_3_4 | OCR_3_2_3_3;
switch (boot_source) {
case BOOT_SOURCE_SDMMC:
- dw_mmc_init(¶ms, &info);
+ dw_mmc_init(¶ms, &mmc_info);
socfpga_io_setup(boot_source);
break;
diff --git a/plat/intel/soc/stratix10/bl2_plat_setup.c b/plat/intel/soc/stratix10/bl2_plat_setup.c
index 721a690..ecf1f01 100644
--- a/plat/intel/soc/stratix10/bl2_plat_setup.c
+++ b/plat/intel/soc/stratix10/bl2_plat_setup.c
@@ -1,6 +1,6 @@
/*
- * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
- * Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
+ * Copyright (c) 2019-2021, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2019-2021, Intel Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -27,6 +27,7 @@
#include "s10_pinmux.h"
#include "wdt/watchdog.h"
+static struct mmc_device_info mmc_info;
const mmap_region_t plat_stratix10_mmap[] = {
MAP_REGION_FLAT(DRAM_BASE, DRAM_SIZE,
@@ -83,7 +84,6 @@
void bl2_el3_plat_arch_setup(void)
{
- struct mmc_device_info info;
const mmap_region_t bl_regions[] = {
MAP_REGION_FLAT(BL2_BASE, BL2_END - BL2_BASE,
MT_MEMORY | MT_RW | MT_SECURE),
@@ -106,12 +106,12 @@
dw_mmc_params_t params = EMMC_INIT_PARAMS(0x100000, get_mmc_clk());
- info.mmc_dev_type = MMC_IS_SD;
- info.ocr_voltage = OCR_3_3_3_4 | OCR_3_2_3_3;
+ mmc_info.mmc_dev_type = MMC_IS_SD;
+ mmc_info.ocr_voltage = OCR_3_3_3_4 | OCR_3_2_3_3;
switch (boot_source) {
case BOOT_SOURCE_SDMMC:
- dw_mmc_init(¶ms, &info);
+ dw_mmc_init(¶ms, &mmc_info);
socfpga_io_setup(boot_source);
break;
diff --git a/plat/st/common/bl2_io_storage.c b/plat/st/common/bl2_io_storage.c
index 3ec7d40..6dedc98 100644
--- a/plat/st/common/bl2_io_storage.c
+++ b/plat/st/common/bl2_io_storage.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -39,6 +39,7 @@
static uintptr_t storage_dev_handle;
#if STM32MP_SDMMC || STM32MP_EMMC
+static struct mmc_device_info mmc_info;
static io_block_spec_t gpt_block_spec = {
.offset = 0,
.length = 34 * MMC_BLOCK_SIZE, /* Size of GPT table */
@@ -276,13 +277,11 @@
uint8_t idx;
struct stm32image_part_info *part;
struct stm32_sdmmc2_params params;
- struct mmc_device_info device_info;
const partition_entry_t *entry;
- zeromem(&device_info, sizeof(struct mmc_device_info));
zeromem(¶ms, sizeof(struct stm32_sdmmc2_params));
- device_info.mmc_dev_type = mmc_dev_type;
+ mmc_info.mmc_dev_type = mmc_dev_type;
switch (boot_interface_instance) {
case 1:
@@ -304,7 +303,7 @@
break;
}
- params.device_info = &device_info;
+ params.device_info = &mmc_info;
if (stm32_sdmmc2_mmc_init(¶ms) != 0) {
ERROR("SDMMC%u init failed\n", boot_interface_instance);
panic();