| commit | e6bd7e2974dd5d5f37f924362fb4b21839a00052 | [log] [tgz] |
|---|---|---|
| author | Manish Pandey <manish.pandey2@arm.com> | Fri Jan 07 17:24:54 2022 +0100 |
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | Fri Jan 07 17:24:54 2022 +0100 |
| tree | c0cb9f520611ba1aa8a3ba957ca6ef637bb3ebd8 | |
| parent | 2a7c12ed75c101a97d6bc4800ec23da87d11e359 [diff] | |
| parent | 620ce334e0f83210fedecf310f1bb13fcc6bc516 [diff] |
Merge changes from topic "st_ddr_updates" into integration * changes: refactor(st-ddr): move basic tests in a dedicated file refactor(st-ddr): reorganize generic and specific elements feat(stm32mp1): allow configuration of DDR AXI ports number refactor(st-ddr): update parameter array initialization feat(st-ddr): add read valid training support refactor(stm32mp1): remove the support of calibration result fix(st-ddr): correct DDR warnings