Tegra: sip_calls: fix defects flagged by MISRA scan
Main fixes:
* Expressions resulting from the expansion of macro parameters
shall be enclosed in parentheses [Rule 20.7]
* Added explicit casts (e.g. 0U) to integers in order for them
to be compatible with whatever operation they're used in [Rule
10.1]
* Fix implicit widening of composite assignment [Rule 10.6]
Change-Id: Ia83c3ab6e4c8c03c19c950978a7936ebfc290590
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
diff --git a/plat/nvidia/tegra/common/tegra_sip_calls.c b/plat/nvidia/tegra/common/tegra_sip_calls.c
index e50d12f..2c3be60 100644
--- a/plat/nvidia/tegra/common/tegra_sip_calls.c
+++ b/plat/nvidia/tegra/common/tegra_sip_calls.c
@@ -41,10 +41,20 @@
uint64_t x2,
uint64_t x3,
uint64_t x4,
- void *cookie,
+ const void *cookie,
void *handle,
uint64_t flags)
{
+ /* unused parameters */
+ (void)smc_fid;
+ (void)x1;
+ (void)x2;
+ (void)x3;
+ (void)x4;
+ (void)cookie;
+ (void)handle;
+ (void)flags;
+
return -ENOTSUP;
}
@@ -61,7 +71,7 @@
u_register_t flags)
{
uint32_t regval;
- int err;
+ int32_t err;
/* Check if this is a SoC specific SiP */
err = plat_sip_handler(smc_fid, x1, x2, x3, x4, cookie, handle, flags);
@@ -176,9 +186,9 @@
DECLARE_RT_SVC(
tegra_sip_fast,
- OEN_SIP_START,
- OEN_SIP_END,
- SMC_TYPE_FAST,
- NULL,
- tegra_sip_handler
+ (OEN_SIP_START),
+ (OEN_SIP_END),
+ (SMC_TYPE_FAST),
+ (NULL),
+ (tegra_sip_handler)
);
diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h
index 1fa04ad..ff3d6d2 100644
--- a/plat/nvidia/tegra/include/tegra_private.h
+++ b/plat/nvidia/tegra/include/tegra_private.h
@@ -99,4 +99,22 @@
void tegra_secure_entrypoint(void);
void tegra186_cpu_reset_handler(void);
+/* Declarations for tegra_sip_calls.c */
+uintptr_t tegra_sip_handler(uint32_t smc_fid,
+ u_register_t x1,
+ u_register_t x2,
+ u_register_t x3,
+ u_register_t x4,
+ void *cookie,
+ void *handle,
+ u_register_t flags);
+int plat_sip_handler(uint32_t smc_fid,
+ uint64_t x1,
+ uint64_t x2,
+ uint64_t x3,
+ uint64_t x4,
+ const void *cookie,
+ void *handle,
+ uint64_t flags);
+
#endif /* TEGRA_PRIVATE_H */
diff --git a/plat/nvidia/tegra/soc/t132/plat_sip_calls.c b/plat/nvidia/tegra/soc/t132/plat_sip_calls.c
index 02dd1cd..90c6bb2 100644
--- a/plat/nvidia/tegra/soc/t132/plat_sip_calls.c
+++ b/plat/nvidia/tegra/soc/t132/plat_sip_calls.c
@@ -38,7 +38,7 @@
uint64_t x2,
uint64_t x3,
uint64_t x4,
- void *cookie,
+ const void *cookie,
void *handle,
uint64_t flags)
{
diff --git a/plat/nvidia/tegra/soc/t186/plat_sip_calls.c b/plat/nvidia/tegra/soc/t186/plat_sip_calls.c
index bf98fcf..2e22123 100644
--- a/plat/nvidia/tegra/soc/t186/plat_sip_calls.c
+++ b/plat/nvidia/tegra/soc/t186/plat_sip_calls.c
@@ -60,7 +60,7 @@
uint64_t x2,
uint64_t x3,
uint64_t x4,
- void *cookie,
+ const void *cookie,
void *handle,
uint64_t flags)
{