Tegra186: enable support for simulation environment
The Tegra simulation environment has limited capabilities. This patch
checks the chip's major and minor versions to decide the features to
enable/disable - MCE firmware version checking is disabled and limited
Memory Controller settings are enabled
Change-Id: I258a807cc3b83cdff14a9975b4ab4f9d1a9d7dcf
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
diff --git a/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c b/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
index 0e550f5..9d0d71f 100644
--- a/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
+++ b/plat/nvidia/tegra/soc/t186/drivers/mce/mce.c
@@ -457,7 +457,7 @@
arch_mce_ops_t *ops;
uint32_t cpu_ari_base;
uint64_t version;
- uint32_t major, minor;
+ uint32_t major, minor, chip_minor, chip_major;
/* get a pointer to the CPU's arch_mce_ops_t struct */
ops = mce_get_curr_cpu_ops();
@@ -477,6 +477,17 @@
TEGRA_ARI_VERSION_MAJOR, TEGRA_ARI_VERSION_MINOR);
/*
+ * MCE firmware is not running on simulation platforms. Simulation
+ * platforms are identified by v0.3 from the Tegra Chip ID value.
+ */
+ chip_major = (mmio_read_32(TEGRA_MISC_BASE + HARDWARE_REVISION_OFFSET) >>
+ MAJOR_VERSION_SHIFT) & MAJOR_VERSION_MASK;
+ chip_minor = (mmio_read_32(TEGRA_MISC_BASE + HARDWARE_REVISION_OFFSET) >>
+ MINOR_VERSION_SHIFT) & MINOR_VERSION_MASK;
+ if ((chip_major == 0) && (chip_minor == 3))
+ return;
+
+ /*
* Verify that the MCE firmware version and the interface header
* match
*/