rockchip: rk3399: add support for ddrfreq suspend/resume
This patch sets the frequency configuration of the next DRAM DFS index
to the configuration of the current index. This does not perform a
frequency transition. It just configures registers so the training on
resume for both indices will be correct.
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c
index 6aeabfe..b8afd38 100644
--- a/plat/rockchip/rk3399/drivers/pmu/pmu.c
+++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c
@@ -33,6 +33,7 @@
#include <bakery_lock.h>
#include <debug.h>
#include <delay_timer.h>
+#include <dfs.h>
#include <errno.h>
#include <gpio.h>
#include <mmio.h>
@@ -1076,6 +1077,7 @@
uint32_t wait_cnt = 0;
uint32_t status = 0;
+ ddr_prepare_for_sys_suspend();
dmc_save();
pmu_scu_b_pwrdn();
@@ -1219,6 +1221,8 @@
m0_stop();
+ ddr_prepare_for_sys_resume();
+
return 0;
}