Tegra194: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
diff --git a/plat/nvidia/tegra/soc/t194/plat_trampoline.S b/plat/nvidia/tegra/soc/t194/plat_trampoline.S
index 111fc15..ea8cbef 100644
--- a/plat/nvidia/tegra/soc/t194/plat_trampoline.S
+++ b/plat/nvidia/tegra/soc/t194/plat_trampoline.S
@@ -70,8 +70,9 @@
__tegra194_cpu_reset_handler_data:
.quad tegra_secure_entrypoint
.quad __BL31_END__ - BL31_BASE
- .globl __tegra194_smmu_ctx_start
-__tegra194_smmu_ctx_start:
+
+ .align 4
+__tegra194_smmu_context:
.rept TEGRA194_SMMU_CTX_SIZE
.quad 0
.endr
@@ -81,3 +82,29 @@
.align 4
.globl __tegra194_cpu_reset_handler_end
__tegra194_cpu_reset_handler_end:
+
+ .globl tegra194_get_cpu_reset_handler_size
+ .globl tegra194_get_cpu_reset_handler_base
+ .globl tegra194_get_smmu_ctx_offset
+
+/* return size of the CPU reset handler */
+func tegra194_get_cpu_reset_handler_size
+ adr x0, __tegra194_cpu_reset_handler_end
+ adr x1, tegra194_cpu_reset_handler
+ sub x0, x0, x1
+ ret
+endfunc tegra194_get_cpu_reset_handler_size
+
+/* return the start address of the CPU reset handler */
+func tegra194_get_cpu_reset_handler_base
+ adr x0, tegra194_cpu_reset_handler
+ ret
+endfunc tegra194_get_cpu_reset_handler_base
+
+/* return the size of the SMMU context */
+func tegra194_get_smmu_ctx_offset
+ adr x0, __tegra194_smmu_context
+ adr x1, tegra194_cpu_reset_handler
+ sub x0, x0, x1
+ ret
+endfunc tegra194_get_smmu_ctx_offset