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git01.mediatek.com / filogic / atf / e02c7f3ae750292c2432c5f253d356efe9f22fc1 / . / plat / xilinx / versal_net
tree: f8e0c83be231251cb02c594f24fcdca68d63e4d6 [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. tsp/
  5. bl31_versal_net_setup.c
  6. plat_psci.c
  7. plat_psci_pm.c
  8. plat_topology.c
  9. platform.mk
  10. sip_svc_setup.c
  11. versal_net_ipi.c