fix(cpus): workaround for Cortex-A78C erratum 2743232
Cortex-A78C erratum 2743232 is a Cat B erratum that applies
to revisions r0p1 and r0p2 and is still open.
The workaround is to set CPUACTLR5_EL1[56:55] to 2'b01.
SDEN Documentation:
https://developer.arm.com/documentation/SDEN-2004089/latest
Change-Id: Ic62579c2dd69b7a8cbbeaa936f45b2cc9436439a
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
diff --git a/services/std_svc/errata_abi/errata_abi_main.c b/services/std_svc/errata_abi/errata_abi_main.c
index c70f606..cf2e653 100644
--- a/services/std_svc/errata_abi/errata_abi_main.c
+++ b/services/std_svc/errata_abi/errata_abi_main.c
@@ -239,9 +239,10 @@
[5] = {2395411, 0x01, 0x02, ERRATA_A78C_2395411},
[6] = {2712575, 0x01, 0x02, ERRATA_A78C_2712575, \
ERRATA_NON_ARM_INTERCONNECT},
- [7] = {2772121, 0x00, 0x02, ERRATA_A78C_2772121},
- [8] = {2779484, 0x01, 0x02, ERRATA_A78C_2779484},
- [9 ... ERRATA_LIST_END] = UNDEF_ERRATA,
+ [7] = {2743232, 0x01, 0x02, ERRATA_A78C_2743232},
+ [8] = {2772121, 0x00, 0x02, ERRATA_A78C_2772121},
+ [9] = {2779484, 0x01, 0x02, ERRATA_A78C_2779484},
+ [10 ... ERRATA_LIST_END] = UNDEF_ERRATA,
}
},
#endif /* CORTEX_A78C_H_INC */