Remove duplicated definitions of linker symbols
Many parts of the code were duplicating symbols that are defined in
include/common/bl_common.h. It is better to only use the definitions in
this header.
As all the symbols refer to virtual addresses, they have to be
uintptr_t, not unsigned long. This has also been fixed in bl_common.h.
Change-Id: I204081af78326ced03fb05f69846f229d324c711
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
diff --git a/plat/arm/common/tsp/arm_tsp_setup.c b/plat/arm/common/tsp/arm_tsp_setup.c
index 2965ccd..a3dfa1e 100644
--- a/plat/arm/common/tsp/arm_tsp_setup.c
+++ b/plat/arm/common/tsp/arm_tsp_setup.c
@@ -15,8 +15,6 @@
#include <drivers/console.h>
#include <plat/arm/common/plat_arm.h>
-#define BL32_END (unsigned long)(&__BL32_END__)
-
/* Weak definitions may be overridden in specific ARM standard platform */
#pragma weak tsp_early_platform_setup
#pragma weak tsp_platform_setup
diff --git a/plat/arm/css/sgi/sgi_plat.c b/plat/arm/css/sgi/sgi_plat.c
index 83ca30c..42eff86 100644
--- a/plat/arm/css/sgi/sgi_plat.c
+++ b/plat/arm/css/sgi/sgi_plat.c
@@ -15,23 +15,6 @@
#include <plat/common/platform.h>
#include <services/secure_partition.h>
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
-#define BL31_COHERENT_RAM_BASE (uintptr_t)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (uintptr_t)(&__COHERENT_RAM_END__)
-#endif
-
#define SGI_MAP_FLASH0_RO MAP_REGION_FLAT(V2M_FLASH0_BASE,\
V2M_FLASH0_SIZE, \
MT_DEVICE | MT_RO | MT_SECURE)
diff --git a/plat/hisilicon/hikey/hikey_bl2_setup.c b/plat/hisilicon/hikey/hikey_bl2_setup.c
index b872373..c57fea9 100644
--- a/plat/hisilicon/hikey/hikey_bl2_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl2_setup.c
@@ -29,26 +29,7 @@
#include <hisi_sram_map.h>
#include "hikey_private.h"
-/*
- * The next 2 constants identify the extents of the code & RO data region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
- */
-#define BL2_RO_BASE (unsigned long)(&__RO_START__)
-#define BL2_RO_LIMIT (unsigned long)(&__RO_END__)
-
-#define BL2_RW_BASE (BL2_RO_LIMIT)
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
+#define BL2_RW_BASE (BL_CODE_END)
static meminfo_t bl2_el3_tzram_layout;
static console_pl011_t console;
@@ -295,10 +276,10 @@
{
hikey_init_mmu_el3(bl2_el3_tzram_layout.total_base,
bl2_el3_tzram_layout.total_size,
- BL2_RO_BASE,
- BL2_RO_LIMIT,
- BL2_COHERENT_RAM_BASE,
- BL2_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
void bl2_platform_setup(void)
diff --git a/plat/hisilicon/hikey/hikey_bl31_setup.c b/plat/hisilicon/hikey/hikey_bl31_setup.c
index b2dcb61..0326e9f 100644
--- a/plat/hisilicon/hikey/hikey_bl31_setup.c
+++ b/plat/hisilicon/hikey/hikey_bl31_setup.c
@@ -25,25 +25,6 @@
#include "hikey_private.h"
-/*
- * The next 2 constants identify the extents of the code & RO data region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
- */
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
static console_pl011_t console;
@@ -135,10 +116,10 @@
{
hikey_init_mmu_el3(BL31_BASE,
BL31_LIMIT - BL31_BASE,
- BL31_RO_BASE,
- BL31_RO_LIMIT,
- BL31_COHERENT_RAM_BASE,
- BL31_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
/* Initialize EDMAC controller with non-secure mode. */
diff --git a/plat/hisilicon/hikey960/hikey960_bl2_setup.c b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
index 788392d..7102de8 100644
--- a/plat/hisilicon/hikey960/hikey960_bl2_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl2_setup.c
@@ -28,26 +28,7 @@
#include "hikey960_def.h"
#include "hikey960_private.h"
-/*
- * The next 2 constants identify the extents of the code & RO data region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
- */
-#define BL2_RO_BASE (unsigned long)(&__RO_START__)
-#define BL2_RO_LIMIT (unsigned long)(&__RO_END__)
-
-#define BL2_RW_BASE (BL2_RO_LIMIT)
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
+#define BL2_RW_BASE (BL_CODE_END)
static meminfo_t bl2_el3_tzram_layout;
static console_pl011_t console;
@@ -312,10 +293,10 @@
{
hikey960_init_mmu_el3(bl2_el3_tzram_layout.total_base,
bl2_el3_tzram_layout.total_size,
- BL2_RO_BASE,
- BL2_RO_LIMIT,
- BL2_COHERENT_RAM_BASE,
- BL2_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
void bl2_platform_setup(void)
diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
index 67b06f4..f1524b8 100644
--- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
@@ -27,25 +27,6 @@
#include "hikey960_def.h"
#include "hikey960_private.h"
-/*
- * The next 2 constants identify the extents of the code & RO data region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses.
- */
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
static console_pl011_t console;
@@ -140,10 +121,10 @@
{
hikey960_init_mmu_el3(BL31_BASE,
BL31_LIMIT - BL31_BASE,
- BL31_RO_BASE,
- BL31_RO_LIMIT,
- BL31_COHERENT_RAM_BASE,
- BL31_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
static void hikey960_edma_init(void)
diff --git a/plat/hisilicon/poplar/bl2_plat_setup.c b/plat/hisilicon/poplar/bl2_plat_setup.c
index ff8e107..11403b0 100644
--- a/plat/hisilicon/poplar/bl2_plat_setup.c
+++ b/plat/hisilicon/poplar/bl2_plat_setup.c
@@ -24,14 +24,6 @@
#include "hi3798cv200.h"
#include "plat_private.h"
-/* Memory ranges for code and read only data sections */
-#define BL2_RO_BASE (unsigned long)(&__RO_START__)
-#define BL2_RO_LIMIT (unsigned long)(&__RO_END__)
-
-/* Memory ranges for coherent memory section */
-#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE);
static console_pl011_t console;
@@ -206,10 +198,10 @@
{
plat_configure_mmu_el1(bl2_tzram_layout.total_base,
bl2_tzram_layout.total_size,
- BL2_RO_BASE,
- BL2_RO_LIMIT,
- BL2_COHERENT_RAM_BASE,
- BL2_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
}
void bl2_platform_setup(void)
diff --git a/plat/hisilicon/poplar/bl31_plat_setup.c b/plat/hisilicon/poplar/bl31_plat_setup.c
index 69911e8..f81078f 100644
--- a/plat/hisilicon/poplar/bl31_plat_setup.c
+++ b/plat/hisilicon/poplar/bl31_plat_setup.c
@@ -25,14 +25,6 @@
#include "hi3798cv200.h"
#include "plat_private.h"
-/* Memory ranges for code and RO data sections */
-#define BL31_RO_BASE (unsigned long)(&__RO_START__)
-#define BL31_RO_LIMIT (unsigned long)(&__RO_END__)
-
-/* Memory ranges for coherent memory section */
-#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
#define TZPC_SEC_ATTR_CTRL_VALUE (0x9DB98D45)
static entry_point_info_t bl32_image_ep_info;
@@ -133,10 +125,10 @@
{
plat_configure_mmu_el3(BL31_BASE,
(BL31_LIMIT - BL31_BASE),
- BL31_RO_BASE,
- BL31_RO_LIMIT,
- BL31_COHERENT_RAM_BASE,
- BL31_COHERENT_RAM_LIMIT);
+ BL_CODE_BASE,
+ BL_CODE_END,
+ BL_COHERENT_RAM_BASE,
+ BL_COHERENT_RAM_END);
INFO("Boot BL33 from 0x%lx for %lu Bytes\n",
bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2);
diff --git a/plat/layerscape/common/tsp/ls_tsp_setup.c b/plat/layerscape/common/tsp/ls_tsp_setup.c
index c607361..f3b6027 100644
--- a/plat/layerscape/common/tsp/ls_tsp_setup.c
+++ b/plat/layerscape/common/tsp/ls_tsp_setup.c
@@ -4,6 +4,7 @@
* SPDX-License-Identifier: BSD-3-Clause
*/
+#include <common/bl_common.h>
#include <common/debug.h>
#include <common/interrupt_props.h>
#include <drivers/arm/gicv2.h>
@@ -12,8 +13,6 @@
#include "plat_ls.h"
#include "soc.h"
-#define BL32_END (unsigned long)(&__BL32_END__)
-
static const interrupt_prop_t g0_interrupt_props[] = {
INTR_PROP_DESC(9, GIC_HIGHEST_SEC_PRIORITY,
GICV2_INTR_GROUP0, GIC_INTR_CFG_LEVEL),
diff --git a/plat/marvell/common/marvell_bl31_setup.c b/plat/marvell/common/marvell_bl31_setup.c
index 802c013..26ba906 100644
--- a/plat/marvell/common/marvell_bl31_setup.c
+++ b/plat/marvell/common/marvell_bl31_setup.c
@@ -8,6 +8,7 @@
#include <assert.h>
#include <arch.h>
+#include <common/bl_common.h>
#include <common/debug.h>
#ifdef USE_CCI
#include <drivers/arm/cci.h>
@@ -20,15 +21,6 @@
#include <plat_marvell.h>
/*
- * The next 3 constants identify the extents of the code, RO data region and the
- * limit of the BL31 image. These addresses are used by the MMU setup code and
- * therefore they must be page-aligned. It is the responsibility of the linker
- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL31_END (unsigned long)(&__BL31_END__)
-
-/*
* Placeholder variables for copying the arguments that have been passed to
* BL31 from BL2.
*/
diff --git a/plat/qemu/qemu_bl31_setup.c b/plat/qemu/qemu_bl31_setup.c
index 9746811..7453b89 100644
--- a/plat/qemu/qemu_bl31_setup.c
+++ b/plat/qemu/qemu_bl31_setup.c
@@ -16,15 +16,6 @@
#include "qemu_private.h"
/*
- * The next 3 constants identify the extents of the code, RO data region and the
- * limit of the BL3-1 image. These addresses are used by the MMU setup code and
- * therefore they must be page-aligned. It is the responsibility of the linker
- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL31_END (unsigned long)(&__BL31_END__)
-
-/*
* Placeholder variables for copying the arguments that have been passed to
* BL3-1 from BL2.
*/
diff --git a/plat/qemu/sp_min/sp_min_setup.c b/plat/qemu/sp_min/sp_min_setup.c
index 88decdf..88f7397 100644
--- a/plat/qemu/sp_min/sp_min_setup.c
+++ b/plat/qemu/sp_min/sp_min_setup.c
@@ -27,29 +27,6 @@
static entry_point_info_t bl33_image_ep_info;
-/*
- * The next 3 constants identify the extents of the code, RO data region and the
- * limit of the BL3-1 image. These addresses are used by the MMU setup code and
- * therefore they must be page-aligned. It is the responsibility of the linker
- * script to ensure that __RO_START__, __RO_END__ & __BL31_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL32_RO_BASE (unsigned long)(&__RO_START__)
-#define BL32_RO_LIMIT (unsigned long)(&__RO_END__)
-#define BL32_END (unsigned long)(&__BL32_END__)
-
-#if USE_COHERENT_MEM
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-#endif
-
/******************************************************************************
* On a GICv2 system, the Group 1 secure interrupts are treated as Group 0
* interrupts.
@@ -146,7 +123,7 @@
void sp_min_plat_arch_setup(void)
{
qemu_configure_mmu_svc_mon(BL32_RO_BASE, BL32_END - BL32_RO_BASE,
- BL32_RO_BASE, BL32_RO_LIMIT,
+ BL_CODE_BASE, BL_CODE_END,
BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END);
}
diff --git a/plat/rpi3/rpi3_bl31_setup.c b/plat/rpi3/rpi3_bl31_setup.c
index d5c691e..2f1bc64 100644
--- a/plat/rpi3/rpi3_bl31_setup.c
+++ b/plat/rpi3/rpi3_bl31_setup.c
@@ -17,8 +17,6 @@
#include "rpi3_private.h"
-#define BL31_END (uintptr_t)(&__BL31_END__)
-
/*
* Placeholder variables for copying the arguments that have been passed to
* BL31 from BL2.
diff --git a/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c
index e7dcc65..0b232e0 100644
--- a/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c
+++ b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c
@@ -6,11 +6,11 @@
#include <platform_def.h>
+#include <common/bl_common.h>
#include <lib/xlat_tables/xlat_mmu_helpers.h>
#include "../uniphier.h"
-#define BL32_END (unsigned long)(&__BL32_END__)
#define BL32_SIZE ((BL32_END) - (BL32_BASE))
void tsp_early_platform_setup(void)
diff --git a/plat/socionext/uniphier/uniphier_bl2_setup.c b/plat/socionext/uniphier/uniphier_bl2_setup.c
index 7109d21..787b3ac 100644
--- a/plat/socionext/uniphier/uniphier_bl2_setup.c
+++ b/plat/socionext/uniphier/uniphier_bl2_setup.c
@@ -21,7 +21,6 @@
#include "uniphier.h"
-#define BL2_END (unsigned long)(&__BL2_END__)
#define BL2_SIZE ((BL2_END) - (BL2_BASE))
static int uniphier_bl2_kick_scp;
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index b0eb66c..0d0b991 100644
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -16,8 +16,6 @@
#include <plat_private.h>
-#define BL31_END (unsigned long)(&__BL31_END__)
-
static entry_point_info_t bl32_image_ep_info;
static entry_point_info_t bl33_image_ep_info;
diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
index 902e4b3..e3d4164 100644
--- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
+++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
@@ -12,9 +12,6 @@
#include <plat_private.h>
#include <platform_tsp.h>
-
-#define BL32_END (unsigned long)(&__BL32_END__)
-
/*******************************************************************************
* Initialize the UART
******************************************************************************/