Merge "fix(intel): resolved coverity checking" into integration
diff --git a/plat/intel/soc/agilex5/bl2_plat_setup.c b/plat/intel/soc/agilex5/bl2_plat_setup.c
index 88f9880..a2fafd2 100644
--- a/plat/intel/soc/agilex5/bl2_plat_setup.c
+++ b/plat/intel/soc/agilex5/bl2_plat_setup.c
@@ -68,7 +68,7 @@
{
static console_t console;
- handoff reverse_handoff_ptr;
+ handoff reverse_handoff_ptr = { 0 };
generic_delay_timer_init();
config_clkmgr_handoff(&reverse_handoff_ptr);
diff --git a/plat/intel/soc/agilex5/soc/agilex5_clock_manager.c b/plat/intel/soc/agilex5/soc/agilex5_clock_manager.c
index 522bf5d..cc68153 100644
--- a/plat/intel/soc/agilex5/soc/agilex5_clock_manager.c
+++ b/plat/intel/soc/agilex5/soc/agilex5_clock_manager.c
@@ -178,17 +178,7 @@
pllc_reg = CLKMGR_MAINPLL + main_pllc;
pllglob_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB;
break;
- case CLKMGR_PSRC_PER:
- pllm_reg = CLKMGR_PERPLL + CLKMGR_PERPLL_PLLM;
- pllc_reg = CLKMGR_PERPLL + per_pllc;
- pllglob_reg = CLKMGR_PERPLL + CLKMGR_PERPLL_PLLGLOB;
- break;
- default:
- return 0;
}
- pllm_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLM;
- pllc_reg = CLKMGR_MAINPLL + main_pllc;
- pllglob_reg = CLKMGR_MAINPLL + CLKMGR_MAINPLL_PLLGLOB;
ref_clk = get_ref_clk(mmio_read_32(pllglob_reg));
mdiv = CLKMGR_PLLM_MDIV(mmio_read_32(pllm_reg));