| commit | dc90a2bfce4e11d687fb44180bcbbaff7f5b3a29 | [log] [tgz] |
|---|---|---|
| author | Jit Loon Lim <jit.loon.lim@intel.com> | Wed May 17 12:26:11 2023 +0800 |
| committer | Jit Loon Lim <jit.loon.lim@intel.com> | Wed Jul 05 09:08:47 2023 +0800 |
| tree | d92f63ecd0459a2e53b08714f6f9cce3a502455d | |
| parent | b24dddfef9b2a79d90e05643826e410bafb94a6f [diff] |
feat(intel): power manager for Agilex5 SoC FPGA This patch is used to implement power manager data support for Agilex5 SoC FPGA. 1. Added power manager support. 2. Updated product name -> Agilex5 Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com> Change-Id: If0630c5088a1bc63dff64b1aab225fc70effa6e3