feat(cpufeat): add memory retention bit define for CLUSTERPWRDN
Bit1 in the CLUSTERPWRDN register is used to indicate on CLUSTERPACTIVE
that memory retention is required or not. It can be used for
L3 cache memory retention support.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I1c53c90ae3dfbed3be7e5b2b79f2c3565db81012
diff --git a/include/arch/aarch32/arch.h b/include/arch/aarch32/arch.h
index da4ee7f..a711753 100644
--- a/include/arch/aarch32/arch.h
+++ b/include/arch/aarch32/arch.h
@@ -796,5 +796,6 @@
#define DSU_CLUSTER_PWR_OFF 0
#define DSU_CLUSTER_PWR_ON 1
#define DSU_CLUSTER_PWR_MASK U(1)
+#define DSU_CLUSTER_MEM_RET BIT(1)
#endif /* ARCH_H */
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h
index c10102a..b8e3d99 100644
--- a/include/arch/aarch64/arch.h
+++ b/include/arch/aarch64/arch.h
@@ -1414,6 +1414,7 @@
#define DSU_CLUSTER_PWR_OFF 0
#define DSU_CLUSTER_PWR_ON 1
#define DSU_CLUSTER_PWR_MASK U(1)
+#define DSU_CLUSTER_MEM_RET BIT(1)
/*******************************************************************************
* Definitions for CPU Power/Performance Management registers