feat(intel): provide atf build version via smc call
This patch provides ATF build version via SMC call
on Agilex7, Agilex5, Stratix10 and N5X platforms.
Change-Id: I61af83433fe61f85987f38ffc86380a41cdb5289
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@altera.com>
diff --git a/plat/intel/soc/common/include/socfpga_sip_svc.h b/plat/intel/soc/common/include/socfpga_sip_svc.h
index 31474c4..fc667cc 100644
--- a/plat/intel/soc/common/include/socfpga_sip_svc.h
+++ b/plat/intel/soc/common/include/socfpga_sip_svc.h
@@ -1,6 +1,6 @@
/*
* Copyright (c) 2019-2023, Intel Corporation. All rights reserved.
- * Copyright (c) 2024, Altera Corporation. All rights reserved.
+ * Copyright (c) 2024-2025, Altera Corporation. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -146,6 +146,9 @@
#define INTEL_SIP_SMC_SEU_ERR_STATUS 0xC2000099
#define INTEL_SIP_SMC_SAFE_INJECT_SEU_ERR 0xC200009A
+/* ATF build version */
+#define INTEL_SIP_SMC_ATF_BUILD_VER 0xC200009B
+
#define INTEL_SIP_SMC_FCS_SHA_MODE_MASK 0xF
#define INTEL_SIP_SMC_FCS_DIGEST_SIZE_MASK 0xF
#define INTEL_SIP_SMC_FCS_DIGEST_SIZE_OFFSET 4U
diff --git a/plat/intel/soc/common/socfpga_sip_svc.c b/plat/intel/soc/common/socfpga_sip_svc.c
index d64ead7..f7b41fa 100644
--- a/plat/intel/soc/common/socfpga_sip_svc.c
+++ b/plat/intel/soc/common/socfpga_sip_svc.c
@@ -1354,6 +1354,10 @@
status = intel_sdm_safe_inject_seu_err((uint32_t *)&x1, (uint32_t)x2);
SMC_RET1(handle, status);
+ case INTEL_SIP_SMC_ATF_BUILD_VER:
+ SMC_RET4(handle, INTEL_SIP_SMC_STATUS_OK, VERSION_MAJOR,
+ VERSION_MINOR, VERSION_PATCH);
+
default:
return socfpga_sip_handler(smc_fid, x1, x2, x3, x4,
cookie, handle, flags);