PSCI: Use a single mailbox for warm reset for FVP and Juno
Since there is a unique warm reset entry point, the FVP and Juno
port can use a single mailbox instead of maintaining one per core.
The mailbox gets programmed only once when plat_setup_psci_ops()
is invoked during PSCI initialization. This means mailbox is not
zeroed out during wakeup.
Change-Id: Ieba032a90b43650f970f197340ebb0ce5548d432
diff --git a/plat/arm/css/common/aarch64/css_helpers.S b/plat/arm/css/common/aarch64/css_helpers.S
index a8c558b..478d5cf 100644
--- a/plat/arm/css/common/aarch64/css_helpers.S
+++ b/plat/arm/css/common/aarch64/css_helpers.S
@@ -53,28 +53,24 @@
b cb_panic
endfunc plat_secondary_cold_boot_setup
- /* -----------------------------------------------------
+ /* ---------------------------------------------------------------------
* unsigned long plat_get_my_entrypoint (void);
*
- * Main job of this routine is to distinguish between
- * a cold and warm boot on the current CPU.
- * On a cold boot the secondaries first wait for the
- * platform to be initialized after which they are
- * hotplugged in. The primary proceeds to perform the
- * platform initialization.
- * On a warm boot, each cpu jumps to the address in its
- * mailbox.
+ * Main job of this routine is to distinguish between a cold and a warm
+ * boot. On CSS platforms, this distinction is based on the contents of
+ * the Trusted Mailbox. It is initialised to zero by the SCP before the
+ * AP cores are released from reset. Therefore, a zero mailbox means
+ * it's a cold reset.
*
- * TODO: Not a good idea to save lr in a temp reg
- * -----------------------------------------------------
+ * This functions returns the contents of the mailbox, i.e.:
+ * - 0 for a cold boot;
+ * - the warm boot entrypoint for a warm boot.
+ * ---------------------------------------------------------------------
*/
func plat_get_my_entrypoint
- mov x9, x30 // lr
- bl plat_my_core_pos
- ldr x1, =TRUSTED_MAILBOXES_BASE
- lsl x0, x0, #TRUSTED_MAILBOX_SHIFT
- ldr x0, [x1, x0]
- ret x9
+ mov_imm x0, TRUSTED_MAILBOX_BASE
+ ldr x0, [x0]
+ ret
endfunc plat_get_my_entrypoint
/* -----------------------------------------------------------
diff --git a/plat/arm/css/common/css_pm.c b/plat/arm/css/common/css_pm.c
index 49c364d..435ed2a 100644
--- a/plat/arm/css/common/css_pm.c
+++ b/plat/arm/css/common/css_pm.c
@@ -41,7 +41,6 @@
#include <psci.h>
#include "css_scpi.h"
-unsigned long wakeup_address;
#if ARM_RECOM_STATE_ID_ENC
/*
@@ -68,15 +67,11 @@
* Private function to program the mailbox for a cpu before it is released
* from reset.
******************************************************************************/
-static void css_program_mailbox(uint64_t mpidr, uint64_t address)
+static void css_program_mailbox(uintptr_t address)
{
- uint64_t linear_id;
- uint64_t mbox;
-
- linear_id = plat_arm_calc_core_pos(mpidr);
- mbox = TRUSTED_MAILBOXES_BASE + (linear_id << TRUSTED_MAILBOX_SHIFT);
- *((uint64_t *) mbox) = address;
- flush_dcache_range(mbox, sizeof(mbox));
+ uintptr_t *mailbox = (void *) TRUSTED_MAILBOX_BASE;
+ *mailbox = address;
+ flush_dcache_range((uintptr_t) mailbox, sizeof(*mailbox));
}
/*******************************************************************************
@@ -89,12 +84,6 @@
* SCP takes care of powering up parent power domains so we
* only need to care about level 0
*/
-
- /*
- * Setup mailbox with address for CPU entrypoint when it next powers up
- */
- css_program_mailbox(mpidr, wakeup_address);
-
scpi_set_css_power_state(mpidr, scpi_power_on, scpi_power_on,
scpi_power_on);
@@ -124,9 +113,6 @@
/* todo: Is this setup only needed after a cold boot? */
arm_gic_pcpu_distif_setup();
-
- /* Clear the mailbox for this cpu. */
- css_program_mailbox(read_mpidr_el1(), 0);
}
/*******************************************************************************
@@ -188,11 +174,6 @@
assert(target_state->pwr_domain_state[ARM_PWR_LVL0] ==
ARM_LOCAL_STATE_OFF);
- /*
- * Setup mailbox with address for CPU entrypoint when it next powers up.
- */
- css_program_mailbox(read_mpidr_el1(), wakeup_address);
-
css_power_down_common(target_state);
}
@@ -297,8 +278,7 @@
{
*psci_ops = &css_ops;
- wakeup_address = sec_entrypoint;
- flush_dcache_range((unsigned long)&wakeup_address,
- sizeof(wakeup_address));
+ /* Setup mailbox with entry point. */
+ css_program_mailbox(sec_entrypoint);
return 0;
}