tree 2dc3b2a7f0dfebb04ad1e7e019484e043dad2e23
parent 126f4573beed58c813c228c4d99ea534288921a6
author Marek Behún <marek.behun@nic.cz> 1638361391 +0100
committer Marek Behún <marek.behun@nic.cz> 1639009725 +0100

fix(drivers/marvell/comphy-3700): fix reference clock selection value names

The current definitions of reference clock speed register values
  #define PCIE_REF_CLOCK_SPEED_25M       REF_CLOCK_SPEED_30M
  #define USB3_REF_CLOCK_SPEED_25M       REF_CLOCK_SPEED_30M
is ambiguous. The name of the constant implies 25 MHz, but the value
implies 30 MHz, which may make the reader think that the setting has
something to do with both values.

In reality, the values have different tables for SerDes and PCIe/USB3
PHY mode. The value for 25 MHz for PCIe/USB3 mode (0x2) is the value
for 30 MHz for SerDes mode.

Instead of defining the PCIe/USB3 constants relative to SerDes
constants, define them with absolute values, thus making it a little bit
more obvious that different modes have different value tables.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Change-Id: I50c66c6bbe22b9a9bec4685600cb8560524a643c