refactor(amu): detect auxiliary counters at runtime
This change decouples the group 1 counter macros to facilitate dynamic
detection at runtime. These counters remain disabled - we will add
dynamic enablement of them in a later patch.
Change-Id: I820d05f228d440643bdfa308d030bd51ebc0b35a
Signed-off-by: Chris Kay <chris.kay@arm.com>
diff --git a/lib/extensions/amu/aarch32/amu.c b/lib/extensions/amu/aarch32/amu.c
index 4733086..8948798 100644
--- a/lib/extensions/amu/aarch32/amu.c
+++ b/lib/extensions/amu/aarch32/amu.c
@@ -136,30 +136,6 @@
return;
}
-#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
- /* Check and set presence of group 1 counters */
- if (!amu_group1_supported()) {
- ERROR("AMU Counter Group 1 is not implemented\n");
- panic();
- }
-
- /* Check number of group 1 counters */
- uint32_t cnt_num = read_amcgcr_cg1nc();
-
- VERBOSE("%s%u. %s%u\n",
- "Number of AMU Group 1 Counters ", cnt_num,
- "Requested number ", AMU_GROUP1_NR_COUNTERS);
-
- if (cnt_num < AMU_GROUP1_NR_COUNTERS) {
- ERROR("%s%u is less than %s%u\n",
- "Number of AMU Group 1 Counters ", cnt_num,
- "Requested number ", AMU_GROUP1_NR_COUNTERS);
- panic();
- }
- }
-#endif
-
if (el2_unused) {
/*
* Non-secure access from EL0 or EL1 to the Activity Monitor
@@ -172,7 +148,7 @@
write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
+ if (amu_group1_supported()) {
/* Enable group 1 counters */
write_amcntenset1_px(AMU_GROUP1_COUNTERS_MASK);
}
@@ -223,7 +199,7 @@
{
assert(amu_supported());
assert(amu_group1_supported());
- assert(idx < AMU_GROUP1_NR_COUNTERS);
+ assert(idx < read_amcgcr_cg1nc());
return amu_group1_cnt_read_internal(idx);
}
@@ -233,7 +209,7 @@
{
assert(amu_supported());
assert(amu_group1_supported());
- assert(idx < AMU_GROUP1_NR_COUNTERS);
+ assert(idx < read_amcgcr_cg1nc());
amu_group1_cnt_write_internal(idx, val);
isb();
@@ -249,20 +225,12 @@
return (void *)-1;
}
-#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
- if (!amu_group1_supported()) {
- return (void *)-1;
- }
- }
-#endif
-
/* Assert that group 0/1 counter configuration is what we expect */
assert(read_amcntenset0_px() ==
((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U));
#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
+ if (amu_group1_supported()) {
assert(read_amcntenset1_px() == AMU_GROUP1_COUNTERS_MASK);
}
#endif
@@ -273,7 +241,7 @@
write_amcntenclr0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
+ if (amu_group1_supported()) {
write_amcntenclr1_px(AMU_GROUP1_COUNTERS_MASK);
}
#endif
@@ -286,9 +254,9 @@
}
#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
+ if (amu_group1_supported()) {
/* Save group 1 counters */
- for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+ for (i = 0U; i < read_amcgcr_cg1nc(); i++) {
if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) {
ctx->group1_cnts[i] = amu_group1_cnt_read(i);
}
@@ -308,19 +276,11 @@
return (void *)-1;
}
-#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
- if (!amu_group1_supported()) {
- return (void *)-1;
- }
- }
-#endif
-
/* Counters were disabled in `amu_context_save()` */
assert(read_amcntenset0_px() == 0U);
#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
+ if (amu_group1_supported()) {
assert(read_amcntenset1_px() == 0U);
}
#endif
@@ -334,9 +294,9 @@
write_amcntenset0_px((UINT32_C(1) << read_amcgcr_cg0nc()) - 1U);
#if ENABLE_AMU_AUXILIARY_COUNTERS
- if (AMU_GROUP1_NR_COUNTERS > 0U) {
+ if (amu_group1_supported()) {
/* Restore group 1 counters */
- for (i = 0U; i < AMU_GROUP1_NR_COUNTERS; i++) {
+ for (i = 0U; i < read_amcgcr_cg1nc(); i++) {
if ((AMU_GROUP1_COUNTERS_MASK & (1U << i)) != 0U) {
amu_group1_cnt_write(i, ctx->group1_cnts[i]);
}