doc: Fixup some SMCCC links
This is a fixup for patch 3ba55a3c5fa260c9218be1adff8f39fc2a568d68
("docs: Update SMCCC doc, other changes for release"), where some
links names got changed but their references didn't.
Change-Id: I980d04dde338f3539a2ec1ae2e807440587b1cf5
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
diff --git a/docs/components/debugfs-design.rst b/docs/components/debugfs-design.rst
index a4f98d0..2096bdb 100644
--- a/docs/components/debugfs-design.rst
+++ b/docs/components/debugfs-design.rst
@@ -78,7 +78,7 @@
-------------
The communication with the 9p layer in BL31 is made through an SMC conduit
-(`SMC Calling Convention PDD`_), using a specific SiP Function Id. An NS
+(`SMC Calling Convention`_), using a specific SiP Function Id. An NS
shared buffer is used to pass path string parameters, or e.g. to exchange
data on a read operation. Refer to `ARM SiP Services`_ for a description
of the SMC interface.
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst
index 7d99d86..b336b38 100644
--- a/docs/design/firmware-design.rst
+++ b/docs/design/firmware-design.rst
@@ -544,7 +544,7 @@
exception vectors implement more elaborate support for handling SMCs since this
is the only mechanism to access the runtime services implemented by BL31 (PSCI
for example). BL31 checks each SMC for validity as specified by the
-`SMC Calling Convention PDD`_ before passing control to the required SMC
+`SMC Calling Convention`_ before passing control to the required SMC
handler routine.
BL31 programs the ``CNTFRQ_EL0`` register with the clock frequency of the system
@@ -2711,7 +2711,7 @@
- `Power State Coordination Interface PDD`_
-- `SMC Calling Convention PDD`_
+- `SMC Calling Convention`_
- :ref:`Interrupt Management Framework`