feat(stm32mp21): add PWR registers file
Use the new file stm32mp21_pwr.h for STM32MP21 PWR peripheral registers
definition. Update platform code for backup domain write protection
disabling.
Change-Id: Iedfa764529bcd5119be8e94da7f7b84699e86086
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
diff --git a/plat/st/stm32mp2/bl2_plat_setup.c b/plat/st/stm32mp2/bl2_plat_setup.c
index 621b784..82a5e6f 100644
--- a/plat/st/stm32mp2/bl2_plat_setup.c
+++ b/plat/st/stm32mp2/bl2_plat_setup.c
@@ -164,11 +164,19 @@
* The protection is enable at each reset by hardware
* and must be disabled by software.
*/
+#if STM32MP21
+ mmio_setbits_32(pwr_base + PWR_BDCR, PWR_BDCR_DBP);
+
+ while ((mmio_read_32(pwr_base + PWR_BDCR) & PWR_BDCR_DBP) == 0U) {
+ ;
+ }
+#else /* STM32MP21 */
mmio_setbits_32(pwr_base + PWR_BDCR1, PWR_BDCR1_DBD3P);
while ((mmio_read_32(pwr_base + PWR_BDCR1) & PWR_BDCR1_DBD3P) == 0U) {
;
}
+#endif /* STM32MP21 */
/* Reset backup domain on cold boot cases */
if ((mmio_read_32(rcc_base + RCC_BDCR) & RCC_BDCR_RTCCKEN) == 0U) {