diff --git a/bl32/tsp/aarch64/tsp_entrypoint.S b/bl32/tsp/aarch64/tsp_entrypoint.S
index aeb54bc..fab64cf 100644
--- a/bl32/tsp/aarch64/tsp_entrypoint.S
+++ b/bl32/tsp/aarch64/tsp_entrypoint.S
@@ -55,16 +55,6 @@
 
 
 func tsp_entrypoint
-	/*---------------------------------------------
-	 * Store the extents of the tzram available to
-	 * BL32 for future use.
-	 * TODO: We are assuming that x9-x10 will not be
-	 * corrupted by any function before platform
-	 * setup.
-	 * ---------------------------------------------
-	 */
-	mov	x9, x0
-	mov	x10, x1
 
 	/* ---------------------------------------------
 	 * The entrypoint is expected to be executed
@@ -119,8 +109,6 @@
 	 * specific early arch. setup e.g. mmu setup
 	 * ---------------------------------------------
 	 */
-	mov	x0, x9
-	mov	x1, x10
 	bl	bl32_early_platform_setup
 	bl	bl32_plat_arch_setup
 
diff --git a/bl32/tsp/tsp_main.c b/bl32/tsp/tsp_main.c
index a667ffc..a7c7386 100644
--- a/bl32/tsp/tsp_main.c
+++ b/bl32/tsp/tsp_main.c
@@ -38,6 +38,13 @@
 #include <tsp.h>
 
 /*******************************************************************************
+ * Declarations of linker defined symbols which will help us find the layout
+ * of trusted SRAM
+ ******************************************************************************/
+extern unsigned long __RO_START__;
+extern unsigned long __COHERENT_RAM_END__;
+
+/*******************************************************************************
  * Lock to control access to the console
  ******************************************************************************/
 spinlock_t console_lock;
@@ -66,6 +73,15 @@
 	tsp_cpu_suspend_entry,
 };
 
+
+/*******************************************************************************
+ * The BL32 memory footprint starts with an RO sections and ends
+ * with a section for coherent RAM. Use it to find the memory size
+ ******************************************************************************/
+#define BL32_TOTAL_BASE (unsigned long)(&__RO_START__)
+
+#define BL32_TOTAL_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
+
 static tsp_args_t *set_smc_args(uint64_t arg0,
 			     uint64_t arg1,
 			     uint64_t arg2,
@@ -107,10 +123,6 @@
 	uint64_t mpidr = read_mpidr();
 	uint32_t linear_id = platform_get_core_pos(mpidr);
 
-#if DEBUG
-	meminfo_t *mem_layout = bl32_plat_sec_mem_layout();
-#endif
-
 	/* Initialize the platform */
 	bl32_platform_setup();
 
@@ -123,10 +135,9 @@
 
 	spin_lock(&console_lock);
 	printf("TSP %s\n\r", build_message);
-	INFO("Total memory base : 0x%x\n", mem_layout->total_base);
-	INFO("Total memory size : 0x%x bytes\n", mem_layout->total_size);
-	INFO("Free memory base  : 0x%x\n", mem_layout->free_base);
-	INFO("Free memory size  : 0x%x bytes\n", mem_layout->free_size);
+	INFO("Total memory base : 0x%x\n", (unsigned long)BL32_TOTAL_BASE);
+	INFO("Total memory size : 0x%x bytes\n",
+			 (unsigned long)(BL32_TOTAL_LIMIT - BL32_TOTAL_BASE));
 	INFO("cpu 0x%x: %d smcs, %d erets %d cpu on requests\n", mpidr,
 	     tsp_stats[linear_id].smc_count,
 	     tsp_stats[linear_id].eret_count,