Merge "docs(maintainers): update qti maintainer" into integration
diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index bf5bd8d..0283553 100644
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -512,7 +512,7 @@
/*
* Shift copied SCR_EL3.NSE bit by 5 to create space for
- * SCR_EL3.NS bit. Bit 5 of the flag correspondes to
+ * SCR_EL3.NS bit. Bit 5 of the flag corresponds to
* the SCR_EL3.NSE bit.
*/
lsl x7, x7, #5
@@ -521,6 +521,16 @@
/* Copy SCR_EL3.NS bit to the flag to indicate caller's security */
bfi x7, x18, #0, #1
+ /*
+ * Per SMCCCv1.3 a caller can set the SVE hint bit in the SMC FID
+ * passed through x0. Copy the SVE hint bit to flags and mask the
+ * bit in smc_fid passed to the standard service dispatcher.
+ * A service/dispatcher can retrieve the SVE hint bit state from
+ * flags using the appropriate helper.
+ */
+ bfi x7, x0, #FUNCID_SVE_HINT_SHIFT, #FUNCID_SVE_HINT_MASK
+ bic x0, x0, #(FUNCID_SVE_HINT_MASK << FUNCID_SVE_HINT_SHIFT)
+
mov sp, x12
/* Get the unique owning entity number */
diff --git a/changelog.yaml b/changelog.yaml
index 8fcb217..b1d5221 100644
--- a/changelog.yaml
+++ b/changelog.yaml
@@ -89,18 +89,42 @@
- title: Activity Monitors Extension (FEAT_AMU)
scope: amu
+ - title: Branch Record Buffer Extension (FEAT_BRBE)
+ scope: brbe
+
+ - title: Branch Target Identification Extension
+ scope: bti
+
- title: Confidential Compute Architecture (CCA)
scope: cca
+ - title: Extended Cache Index (FEAT_CCIDX)
+ scope: ccidx
+
- title: Support for the `HCRX_EL2` register (FEAT_HCX)
scope: hcx
- title: Memory Partitioning and Monitoring (MPAM) Extension (FEAT_MPAM)
scope: mpam
+ - title: Memory Tagging Extension
+ scope: mte
+
+ - title: Pointer Authentication Extension
+ scope: pauth
+
+ - title: Performance Monitors Extension (FEAT_PMUv3)
+ scope: pmu
+
+ - title: Trapping support for RNDR/RNDRRS (FEAT_RNG_TRAP)
+ scope: rng-trap
+
- title: Scalable Matrix Extension (FEAT_SME)
scope: sme
+ - title: Statistical profiling Extension (FEAT_SPE)
+ scope: spe
+
- title: Scalable Vector Extension (FEAT_SVE)
scope: sve
@@ -116,21 +140,6 @@
- title: Self-hosted Trace Extensions (FEAT_TRF)
scope: trf
- - title: Statistical profiling Extension (FEAT_SPE)
- scope: spe
-
- - title: Branch Record Buffer Extension (FEAT_BRBE)
- scope: brbe
-
- - title: Extended Cache Index (FEAT_CCIDX)
- scope: ccidx
-
- - title: Trapping support for RNDR/RNDRRS (FEAT_RNG_TRAP)
- scope: rng-trap
-
- - title: Performance Monitors Extension (FEAT_PMUv3)
- scope: pmu
-
- title: Platforms
subsections:
@@ -147,6 +156,12 @@
- plat/arm
subsections:
+ - title: CSS
+ scope: css
+
+ deprecated:
+ - plat/arm/css
+
- title: FPGA
scope: fpga
@@ -160,6 +175,7 @@
deprecated:
- plat/fvp
+ - fvp/tsp_manifest
- title: FVP-R
scope: fvp-r
@@ -167,6 +183,9 @@
deprecated:
- fvp_r
+ - title: FVP Versatile Express
+ scope: fvp_ve
+
- title: Juno
scope: juno
@@ -209,6 +228,16 @@
- title: Broadcom
scope: brcm
+ - title: HiSilicon
+ scope: hisilicon
+
+ subsections:
+ - title: HiKey
+ scope: hikey
+
+ - title: HiKey960
+ scope: hikey960
+
- title: Intel
scope: intel
@@ -256,6 +285,16 @@
deprecated:
- plat/mediatek/mt8183
+ - title: MT8186
+ scope: mt8186
+
+ deprecated:
+ - plat/mediatek/mt8186
+ - mt8186-emi-mpu
+
+ - title: MT8188
+ scope: mt8188
+
- title: MT8192
scope: mt8192
@@ -270,12 +309,6 @@
- plat/mediatek/mt8195
- plat/mdeiatek/mt8195
- - title: MT8186
- scope: mt8186
-
- deprecated:
- - plat/mediatek/mt8186
-
- title: NVIDIA
scope: nvidia
@@ -426,6 +459,9 @@
- title: QTI
scope: qti
+ deprecated:
+ - plat/qti
+
subsections:
- title: SC1780
scope: sc7180
@@ -446,6 +482,9 @@
scope: rpi
subsections:
+ - title: Raspberry Pi 3
+ scope: rpi3
+
- title: Raspberry Pi 4
scope: rpi4
@@ -514,6 +553,9 @@
- title: K3
scope: k3
+ deprecated:
+ - ti-k3
+
- title: Xilinx
scope: xilinx
@@ -529,6 +571,13 @@
- plat/xilinx/versal
- plat/versal
+ subsections:
+ - title: Versal NET
+ scope: versal-net
+
+ deprecated:
+ - versal_net
+
- title: ZynqMP
scope: zynqmp
@@ -572,6 +621,9 @@
- title: RME
scope: rme
+ deprecated:
+ - rme/fid
+
subsections:
- title: TRP
scope: trp
@@ -586,6 +638,9 @@
- title: EL3 SPMC
scope: el3-spmc
+ deprecated:
+ - spmc
+
- title: SPMD
scope: spmd
@@ -616,6 +671,9 @@
- title: Context Management
scope: cm
+ - title: RAS
+ scope: ras
+
- title: FCONF
scope: fconf
@@ -652,8 +710,14 @@
- title: PSA
scope: psa
+ deprecated:
+ - lib/psa
+
- title: Context Management
- scope: context mgmt
+ scope: context-mgmt
+
+ deprecated:
+ - context mgmt
- title: Semihosting
scope: semihosting
@@ -735,6 +799,7 @@
deprecated:
- scmi_common
- drivers/scmi-msg
+ - scmi-msg
- title: UFS
scope: ufs
@@ -756,7 +821,13 @@
- title: GICv3
scope: gicv3
+ deprecated:
+ - gicv3/multichip
+
subsections:
+ - title: GIC-600
+ scope: gic600
+
- title: GIC-600AE
scope: gic600ae
@@ -1171,6 +1242,9 @@
- title: Certificate Creation Tool
scope: cert-create
+ deprecated:
+ - cert_create
+
- title: Dependencies
scope: deps
diff --git a/docs/design/firmware-design.rst b/docs/design/firmware-design.rst
index 71fdfcb..84bba18 100644
--- a/docs/design/firmware-design.rst
+++ b/docs/design/firmware-design.rst
@@ -990,9 +990,10 @@
directly, the others are saved into memory for retrieval (if needed) by the
handler. The handler is also provided with an opaque ``handle`` for use with the
supporting library for parameter retrieval, setting return values and context
-manipulation; and with ``flags`` indicating the security state of the caller. The
-framework finally sets up the execution stack for the handler, and invokes the
-services ``handle()`` function.
+manipulation. The ``flags`` parameter indicates the security state of the caller
+and the state of the SVE hint bit per the SMCCCv1.3. The framework finally sets
+up the execution stack for the handler, and invokes the services ``handle()``
+function.
On return from the handler the result registers are populated in X0-X7 as needed
before restoring the stack and CPU state and returning from the original SMC.
diff --git a/docs/getting_started/prerequisites.rst b/docs/getting_started/prerequisites.rst
index 65a66b6..9496576 100644
--- a/docs/getting_started/prerequisites.rst
+++ b/docs/getting_started/prerequisites.rst
@@ -104,14 +104,15 @@
sudo apt install device-tree-compiler
-Additionally, to install an up-to-date version of Node.js, you can use the `Node
-Version Manager`_ to install a version of your choosing (we recommend 16, but
-later LTS versions might offer a more stable experience):
+Additionally, to install a version of Node.js compatible with TF-A's repository
+scripts, you can use the `Node Version Manager`_. To install both NVM and an
+appropriate version of Node.js, run the following **from the root directory of
+the repository**:
.. code:: shell
- curl -o- https://raw.githubusercontent.com/nvm-sh/nvm/v0.39.0/install.sh | "$SHELL"
- exec "$SHELL" -ic "nvm install 16; exec $SHELL"
+ curl -o- https://raw.githubusercontent.com/nvm-sh/nvm/v0.39.1/install.sh | bash
+ exec "$SHELL" -ic "nvm install; exec $SHELL"
.. _Node Version Manager: https://github.com/nvm-sh/nvm#install--update-script
diff --git a/docs/plat/index.rst b/docs/plat/index.rst
index 28b1787..25d8771 100644
--- a/docs/plat/index.rst
+++ b/docs/plat/index.rst
@@ -59,10 +59,9 @@
- Arm Neoverse N1 System Development Platform (N1SDP)
- Arm Neoverse Reference Design N1 Edge (RD-N1-Edge) FVP
- Arm Neoverse Reference Design E1 Edge (RD-E1-Edge) FVP
- - Arm SGI-575 and SGM-775
- - MediaTek MT6795 and MT8173 SoCs
- - Arm Morello Platform
+ - Arm SGI-575
+ - MediaTek MT8173 SoCs
--------------
-*Copyright (c) 2019-2020, Arm Limited. All rights reserved.*
+*Copyright (c) 2019-2022, Arm Limited. All rights reserved.*
diff --git a/docs/process/commit-style.rst b/docs/process/commit-style.rst
index de899ab..d7e937b 100644
--- a/docs/process/commit-style.rst
+++ b/docs/process/commit-style.rst
@@ -96,36 +96,25 @@
Adding Scopes
-------------
-Scopes that are either a) unblessed in the configuration file, or b) do not
-exist in the configuration file at all are considered to be deprecated. If you
-are adding a new component that does not yet have a designated scope, please
-feel free to add one.
+Scopes that are not present in the changelog configuration file are considered
+to be deprecated, and should be avoided. If you are adding a new component that
+does not yet have a designated scope, please add one.
For example, if you are adding or making modifications to `Foo`'s latest and
-greatest new platform `Bar`, you would add it to the `Platforms` changelog
-section, and the hierarchy should look something like this:
+greatest new platform `Bar` then you would add it to the `Platforms` changelog
+sub-section, and the hierarchy should look something like this:
-.. code:: json
+.. code:: yaml
- {
- "sections": [
- {
- "title": "Platforms",
- "sections": [
- {
- "title": "Foo",
- "scopes": ["foo"],
- "sections": [
- {
- "title": "Bar",
- "scopes": ["bar"]
- }
- ]
- }
- ]
- }
- ]
- }
+ - title: Platforms
+
+ subsections:
+ - title: Foo
+ scope: foo
+
+ subsections:
+ - title: Bar
+ scope: bar
When creating new scopes, try to keep them short and succinct, and use kebab
case (``this-is-kebab-case``). Components with a product name (i.e. most
@@ -138,7 +127,9 @@
Commits are expected to be signed off with the ``Signed-off-by:`` trailer using
your real name and email address. You can do this automatically by committing
-with Git's ``-s`` flag.
+with Git's ``-s`` flag. By adding this line the contributor certifies the
+contribution is made under the terms of the :download:`Developer Certificate of
+Origin <../../dco.txt>`.
There may be multiple ``Signed-off-by:`` lines depending on the history of the
patch, but one **must** be the committer. More details may be found in the
diff --git a/include/lib/smccc.h b/include/lib/smccc.h
index 9940ea9..cce91af 100644
--- a/include/lib/smccc.h
+++ b/include/lib/smccc.h
@@ -37,6 +37,10 @@
#define FUNCID_OEN_MASK U(0x3f)
#define FUNCID_OEN_WIDTH U(6)
+#define FUNCID_SVE_HINT_SHIFT U(16)
+#define FUNCID_SVE_HINT_MASK U(1)
+#define FUNCID_SVE_HINT_WIDTH U(1)
+
#define FUNCID_NUM_SHIFT U(0)
#define FUNCID_NUM_MASK U(0xffff)
#define FUNCID_NUM_WIDTH U(16)
@@ -122,6 +126,12 @@
* 0 0 SMC_FROM_SECURE
* 0 1 SMC_FROM_NON_SECURE
* 1 1 SMC_FROM_REALM
+ *
+ * Bit 16 of flags records the caller's SMC
+ * SVE hint bit according to SMCCCv1.3.
+ * It can be consumed by dispatchers using
+ * is_sve_hint_set macro.
+ *
*/
#define SMC_FROM_SECURE (U(0) << 0)
@@ -148,6 +158,9 @@
#define is_caller_secure(_f) (!is_caller_non_secure(_f))
#endif /* ENABLE_RME */
+#define is_sve_hint_set(_f) (((_f) & (FUNCID_SVE_HINT_MASK \
+ << FUNCID_SVE_HINT_SHIFT)) != U(0))
+
/* The macro below is used to identify a Standard Service SMC call */
#define is_std_svc_call(_fid) (GET_SMC_OEN(_fid) == OEN_STD_START)
diff --git a/plat/arm/board/rdn2/platform.mk b/plat/arm/board/rdn2/platform.mk
index 9728a08..7492fe5 100644
--- a/plat/arm/board/rdn2/platform.mk
+++ b/plat/arm/board/rdn2/platform.mk
@@ -18,6 +18,7 @@
# RD-N2 platform uses GIC-700 which is based on GICv4.1
GIC_ENABLE_V4_EXTN := 1
+GIC_EXT_INTID := 1
#Enable GIC Multichip Extension only for Multichip Platforms
ifeq (${CSS_SGI_PLATFORM_VARIANT}, 2)
diff --git a/plat/arm/board/rdn2/rdn2_plat.c b/plat/arm/board/rdn2/rdn2_plat.c
index 8cf1929..2506f9d 100644
--- a/plat/arm/board/rdn2/rdn2_plat.c
+++ b/plat/arm/board/rdn2/rdn2_plat.c
@@ -47,15 +47,15 @@
#endif
},
.spi_ids = {
- {32, 479},
+ {32, 511},
#if CSS_SGI_CHIP_COUNT > 1
- {0, 0},
+ {512, 991},
#endif
#if CSS_SGI_CHIP_COUNT > 2
- {0, 0},
+ {4096, 4575},
#endif
#if CSS_SGI_CHIP_COUNT > 3
- {0, 0},
+ {4576, 5055},
#endif
}
};
diff --git a/plat/arm/common/arm_common.mk b/plat/arm/common/arm_common.mk
index 682a278..7162ce9 100644
--- a/plat/arm/common/arm_common.mk
+++ b/plat/arm/common/arm_common.mk
@@ -195,8 +195,10 @@
# Enable CRC instructions via extension for ARMv8-A CPUs.
# For ARMv8.1-A, and onwards CRC instructions are default enabled.
# Enable HW computed CRC support unconditionally in BL2 component.
-ifeq (${ARM_ARCH_MINOR},0)
- BL2_CPPFLAGS += -march=armv8-a+crc
+ifeq (${ARM_ARCH_MAJOR},8)
+ ifeq (${ARM_ARCH_MINOR},0)
+ BL2_CPPFLAGS += -march=armv8-a+crc
+ endif
endif
ifeq ($(PSA_FWU_SUPPORT),1)