diff --git a/plat/nxp/common/setup/ls_io_storage.c b/plat/nxp/common/setup/ls_io_storage.c
index 0c01765..7f01e72 100644
--- a/plat/nxp/common/setup/ls_io_storage.c
+++ b/plat/nxp/common/setup/ls_io_storage.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
  *
  * SPDX-License-Identifier: BSD-3-Clause
  *
@@ -19,6 +19,12 @@
 #ifdef FLEXSPI_NOR_BOOT
 #include <flexspi_nor.h>
 #endif
+#if defined(NAND_BOOT)
+#include <ifc_nand.h>
+#endif
+#if defined(NOR_BOOT)
+#include <ifc_nor.h>
+#endif
 #if defined(QSPI_BOOT)
 #include <qspi.h>
 #endif
@@ -263,7 +269,7 @@
 	return result;
 }
 
-#if defined(SD_BOOT) || defined(EMMC_BOOT)
+#if defined(SD_BOOT) || defined(EMMC_BOOT) || defined(NAND_BOOT)
 static int plat_io_block_setup(size_t fip_offset, uintptr_t block_dev_spec)
 {
 	int io_result;
@@ -282,7 +288,7 @@
 }
 #endif
 
-#if defined(FLEXSPI_NOR_BOOT) || defined(QSPI_BOOT)
+#if defined(FLEXSPI_NOR_BOOT) || defined(QSPI_BOOT) || defined(NOR_BOOT)
 static int plat_io_memmap_setup(size_t fip_offset)
 {
 	int io_result;
@@ -401,20 +407,51 @@
 
 int ifc_nor_io_setup(void)
 {
+#if defined(NOR_BOOT)
+	int ret;
+
+	ret = ifc_nor_init(NXP_NOR_FLASH_ADDR,
+			NXP_NOR_FLASH_SIZE);
+
+	if (ret != 0) {
+		return ret;
+	}
+
+	return plat_io_memmap_setup(NXP_NOR_FLASH_ADDR + PLAT_FIP_OFFSET);
+#else
 	ERROR("NOR driver not present. Check your BUILD\n");
 
 	/* Should never reach here */
 	assert(false);
 	return -1;
+#endif
 }
 
 int ifc_nand_io_setup(void)
 {
+#if defined(NAND_BOOT)
+	uintptr_t block_dev_spec;
+	int ret;
+
+	ret = ifc_nand_init(&block_dev_spec,
+			NXP_IFC_REGION_ADDR,
+			NXP_IFC_ADDR,
+			NXP_IFC_SRAM_BUFFER_SIZE,
+			NXP_SD_BLOCK_BUF_ADDR,
+			NXP_SD_BLOCK_BUF_SIZE);
+	if (ret != 0) {
+		return ret;
+	}
+
+	return plat_io_block_setup(PLAT_FIP_OFFSET, block_dev_spec);
+#else
+
 	ERROR("NAND driver not present. Check your BUILD\n");
 
 	/* Should never reach here */
 	assert(false);
 	return -1;
+#endif
 }
 
 int ls_flexspi_nor_io_setup(void)