fdts: a5ds: add L2 cache node in devicetree
This change is to add L2 cache node into a5ds device tree.
Change-Id: I64b4b3e839c3ee565abbcd1567d1aa358c32d947
Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com>
diff --git a/fdts/a5ds.dts b/fdts/a5ds.dts
index 91212e8..042b6af 100644
--- a/fdts/a5ds.dts
+++ b/fdts/a5ds.dts
@@ -27,24 +27,28 @@
compatible = "arm,cortex-a5";
enable-method = "psci";
reg = <0>;
+ next-level-cache = <&L2>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a5";
enable-method = "psci";
reg = <1>;
+ next-level-cache = <&L2>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a5";
enable-method = "psci";
reg = <2>;
+ next-level-cache = <&L2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a5";
enable-method = "psci";
reg = <3>;
+ next-level-cache = <&L2>;
};
};
@@ -53,6 +57,16 @@
reg = <0x80000000 0x7F000000>;
};
+ L2: cache-controller@1C010000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x1C010000 0x1000>;
+ interrupts = <0 84 4>;
+ cache-level = <2>;
+ cache-unified;
+ arm,data-latency = <1 1 1>;
+ arm,tag-latency = <1 1 1>;
+ };
+
refclk100mhz: refclk100mhz {
compatible = "fixed-clock";
#clock-cells = <0>;