Gitiles
Code Review Sign In
git01.mediatek.com / filogic / atf / d624e7e2b4c75fe6c9b1cb87d0d0fe50763f7d4d / . / docs / resources / diagrams
tree: b4f896ab563c80178dc82ac7fd3662abf741e92c [path history] [tgz]
  1. draw.io/
  2. plantuml/
  3. default_reset_code.png
  4. fwu_flow.png
  5. fwu_states.png
  6. int_handling.dia
  7. Makefile
  8. non-sec-int-handling.png
  9. psci-suspend-sequence.png
  10. reset_code_flow.dia
  11. reset_code_no_boot_type_check.png
  12. reset_code_no_checks.png
  13. reset_code_no_cpu_check.png
  14. romlib_design.dia
  15. romlib_design.png
  16. romlib_wrapper.dia
  17. romlib_wrapper.png
  18. rt-svc-descs-layout.png
  19. sec-int-handling.png
  20. secure_sw_stack_sp.png
  21. secure_sw_stack_tos.png
  22. xlat_align.dia
  23. xlat_align.png