feat(intel): add build option for boot source
Existing boot source is hardcoded in socfpga_plat_def.h.
To change boot source, user need to update code.
Thus adding this will remove the code update needed when
need to change boot source.
Also, it will have ARM_LINUX_KERNEL_AS_BL33 flag for each
platform in platform.mk. This will be easily to control
based on platform build.
Change-Id: I383beb8cbca5ec0f247221ad42796554adc3daae
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>
diff --git a/plat/intel/soc/common/include/platform_def.h b/plat/intel/soc/common/include/platform_def.h
index 0788ab8..f3fb1a4 100644
--- a/plat/intel/soc/common/include/platform_def.h
+++ b/plat/intel/soc/common/include/platform_def.h
@@ -22,6 +22,18 @@
#define PLAT_SOCFPGA_AGILEX5 4
#define SIMICS_RUN 1
#define MAX_IO_MTD_DEVICES U(1)
+/* Boot Source configuration
+ * TODO: Shall consider "assert_numeric" in the future
+ */
+#if SOCFPGA_BOOT_SOURCE_NAND
+#define BOOT_SOURCE BOOT_SOURCE_NAND
+#elif SOCFPGA_BOOT_SOURCE_SDMMC
+#define BOOT_SOURCE BOOT_SOURCE_SDMMC
+#elif SOCFPGA_BOOT_SOURCE_QSPI
+#define BOOT_SOURCE BOOT_SOURCE_QSPI
+#else
+#define BOOT_SOURCE BOOT_SOURCE_SDMMC
+#endif
/* sysmgr.boot_scratch_cold4 & 5 used for CPU release address for SPL */
#define PLAT_CPU_RELEASE_ADDR 0xffd12210
diff --git a/plat/intel/soc/common/include/socfpga_private.h b/plat/intel/soc/common/include/socfpga_private.h
index a0d4180..fbe18c3 100644
--- a/plat/intel/soc/common/include/socfpga_private.h
+++ b/plat/intel/soc/common/include/socfpga_private.h
@@ -24,8 +24,8 @@
BOOT_SOURCE_FPGA = 0,
BOOT_SOURCE_SDMMC,
BOOT_SOURCE_NAND,
- BOOT_SOURCE_RSVD,
- BOOT_SOURCE_QSPI
+ BOOT_SOURCE_QSPI,
+ BOOT_SOURCE_RSVD
} boot_source_type;
/*******************************************************************************