tree 316b01bb6d0e83c886428d3efcd192e240a752b4
parent c3f81d8cf780b6652f7dfc241d9228822f66cf98
author Sieu Mun Tang <sieu.mun.tang@intel.com> 1729754623 +0800
committer Sieu Mun Tang <sieu.mun.tang@intel.com> 1729754623 +0800

feat(intel): pinmux and power manager config for Agilex5 platform

Read the hand-off data and configure the pinmux
select, IO control, IO delay and use FPGA switch.
Configure the power manager PSS SRAM power gate.

Change-Id: I2241018cbf2828182e8af84ddb214ce57e9f242a
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Signed-off-by: Sieu Mun Tang <sieu.mun.tang@intel.com>