| commit | cf91d324ae9a44a486ad6ba53ae0c605f6f300f0 | [log] [tgz] |
|---|---|---|
| author | Etienne Carriere <etienne.carriere@st.com> | Sun Dec 08 08:12:52 2019 +0100 |
| committer | Etienne Carriere <etienne.carriere@st.com> | Thu Jul 16 17:35:19 2020 +0200 |
| tree | baeb47d4da9ef9592f521049d644b0bf2a322b12 | |
| parent | 90a323053b574dba4f16581634ab8a6ab0a98e2a [diff] |
dts: bindings: stm32mp1: define SCMI clock and reset domain IDs Define the platform SCMI clocks and reset domains for stm32mp1 family. SCMI agent 0 accesses clock/reset controllers under RCC TZEN hardening. SCMI agent 1 accesses clock controllers under RCC MCKPROT hardening. Change-Id: I52e906f846d445a3e6850e5f2e1584da14692553 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>