tree f06629e846961b853c91f308f199037907e24007
parent cfcdccabc0e798dfd52303658b4fb450dccf5ecb
parent a9fca836fb9392cb2956923a6c8427c253a4c874
author Sandrine Bailleux <sandrine.bailleux@arm.com> 1681741119 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1681741119 +0200

Merge changes I43a9d83c,Ibfaa47fb into integration

* changes:
  fix(intel): fix Agilex and N5X clock manager to main PLL C0
  feat(intel): implement timer init divider via CPU frequency for N5X