refactor(st): rename QSPI macros
To have a more generic code, remove the Q from the *QSPI macros.
Change-Id: I2fa94b54054036c2175df3dfddcb76eec1119ad2
Signed-off-by: Yann Gautier <yann.gautier@st.com>
diff --git a/plat/st/common/bl2_io_storage.c b/plat/st/common/bl2_io_storage.c
index 5b0a171..0bcfece 100644
--- a/plat/st/common/bl2_io_storage.c
+++ b/plat/st/common/bl2_io_storage.c
@@ -191,13 +191,13 @@
case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
INFO("Using EMMC\n");
break;
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
- INFO("Using QSPI NOR\n");
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
+ INFO("Using SPI NOR\n");
break;
case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
INFO("Using FMC NAND\n");
break;
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_SPI:
INFO("Using SPI NAND\n");
break;
case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
@@ -433,7 +433,7 @@
break;
#endif
#if STM32MP_SPI_NOR
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
dmbsy();
boot_spi_nor(boot_context);
break;
@@ -445,7 +445,7 @@
break;
#endif
#if STM32MP_SPI_NAND
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_SPI:
dmbsy();
boot_spi_nand(boot_context);
break;
@@ -530,14 +530,14 @@
case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
#endif
#if STM32MP_SPI_NAND
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_SPI:
#endif
image_block_spec.offset = STM32MP_NAND_FIP_OFFSET;
break;
#endif
#if STM32MP_SPI_NOR
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
/*
* With FWU Multi Bank feature enabled, the selection of
* the image to boot will be done by fwu_init calling the
@@ -694,7 +694,7 @@
break;
#endif
#if STM32MP_SPI_NOR
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
if (guidcmp(img_uuid, &STM32MP_NOR_FIP_A_GUID) == 0) {
image_spec->offset = STM32MP_NOR_FIP_A_OFFSET;
} else if (guidcmp(img_uuid, &STM32MP_NOR_FIP_B_GUID) == 0) {
@@ -747,7 +747,7 @@
#endif
#if STM32MP_SPI_NOR
- case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
+ case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI:
if (image_id == FWU_METADATA_IMAGE_ID) {
spec->offset = STM32MP_NOR_METADATA1_OFFSET;
} else {
diff --git a/plat/st/stm32mp1/include/boot_api.h b/plat/st/stm32mp1/include/boot_api.h
index 1054609..1340633 100644
--- a/plat/st/stm32mp1/include/boot_api.h
+++ b/plat/st/stm32mp1/include/boot_api.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved
+ * Copyright (c) 2017-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -47,7 +47,7 @@
#define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC 0x3U
/* Boot occurred on QSPI NOR */
-#define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI 0x4U
+#define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_SPI 0x4U
/* Boot occurred on UART */
#define BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART 0x5U
@@ -56,7 +56,7 @@
#define BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB 0x6U
/* Boot occurred on QSPI NAND */
-#define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI 0x7U
+#define BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_SPI 0x7U
/**
* @brief Possible value of boot context field 'EmmcXferStatus'