Fix white space errors + remove #if defined

Fix a few white space errors and remove #if defined in workaround
for N1 Errata 1542419.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I07ac5a2fd50cd63de53c06e3d0f8262871b62fad
diff --git a/lib/cpus/aarch64/neoverse_n1.S b/lib/cpus/aarch64/neoverse_n1.S
index c9bb005..faf53a8 100644
--- a/lib/cpus/aarch64/neoverse_n1.S
+++ b/lib/cpus/aarch64/neoverse_n1.S
@@ -21,9 +21,7 @@
 #error "Neoverse-N1 supports only AArch64. Compile with CTX_INCLUDE_AARCH32_REGS=0"
 #endif
 
-#if ERRATA_N1_IC_TRAP
 	.global neoverse_n1_errata_ic_trap_handler
-#endif
 
 /* --------------------------------------------------
  * Errata Workaround for Neoverse N1 Erratum 1043202.
@@ -356,7 +354,7 @@
 	bl	check_errata_1542419
 	cbz	x0, 1f
 
-        /* Apply instruction patching sequence */
+	/* Apply instruction patching sequence */
 	ldr	x0, =0x0
 	msr	CPUPSELR_EL3, x0
 	ldr	x0, =0xEE670D35
@@ -536,10 +534,10 @@
 	tlbi	vae3is, xzr
 	dsb	sy
 
-        # Skip the IC instruction itself
-        mrs     x3, elr_el3
-        add     x3, x3, #4
-        msr     elr_el3, x3
+	# Skip the IC instruction itself
+	mrs     x3, elr_el3
+	add     x3, x3, #4
+	msr     elr_el3, x3
 
 	ldp	x0, x1, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X0]
 	ldp	x2, x3, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X2]