fix(xilinx): typecast operands to match data type
This corrects the MISRA violation C2012-10.3:
The value of an expression shall not be assigned to an object with a
narrower essential type or of a different essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.
Change-Id: I1606422aadfd64b283fd9948b6dadcddecdf61e0
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
diff --git a/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c b/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c
index 3e239f2..cdff3c8 100644
--- a/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c
+++ b/plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c
@@ -78,8 +78,8 @@
uint32_t ipi_remote_id;
uint32_t is_secure;
- ipi_local_id = x1 & UNSIGNED32_MASK;
- ipi_remote_id = x2 & UNSIGNED32_MASK;
+ ipi_local_id = (uint32_t)(x1 & UNSIGNED32_MASK);
+ ipi_remote_id = (uint32_t)(x2 & UNSIGNED32_MASK);
/* OEN Number 48 to 63 is for Trusted App and OS
* GET_SMC_OEN limits the return value of OEN number to 63 by bitwise
diff --git a/plat/xilinx/common/plat_startup.c b/plat/xilinx/common/plat_startup.c
index c5e3732..9f829c9 100644
--- a/plat/xilinx/common/plat_startup.c
+++ b/plat/xilinx/common/plat_startup.c
@@ -72,11 +72,13 @@
* Return: XBL_FLAGS_A53_0, XBL_FLAGS_A53_1, XBL_FLAGS_A53_2 or XBL_FLAGS_A53_3.
*
*/
-static int32_t get_xbl_cpu(const struct xbl_partition *partition)
+static uint32_t get_xbl_cpu(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & XBL_FLAGS_CPU_MASK;
- return flags >> XBL_FLAGS_CPU_SHIFT;
+ flags >>= XBL_FLAGS_CPU_SHIFT;
+
+ return (uint32_t)flags;
}
/**
@@ -86,11 +88,13 @@
* Return: XBL_FLAGS_EL0, XBL_FLAGS_EL1, XBL_FLAGS_EL2 or XBL_FLAGS_EL3.
*
*/
-static int32_t get_xbl_el(const struct xbl_partition *partition)
+static uint32_t get_xbl_el(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & XBL_FLAGS_EL_MASK;
+ flags >>= XBL_FLAGS_EL_SHIFT;
+
- return flags >> XBL_FLAGS_EL_SHIFT;
+ return (uint32_t)flags;
}
/**
@@ -100,11 +104,13 @@
* Return: XBL_FLAGS_NON_SECURE or XBL_FLAGS_SECURE.
*
*/
-static int32_t get_xbl_ss(const struct xbl_partition *partition)
+static uint32_t get_xbl_ss(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & XBL_FLAGS_TZ_MASK;
- return flags >> XBL_FLAGS_TZ_SHIFT;
+ flags >>= XBL_FLAGS_TZ_SHIFT;
+
+ return (uint32_t)flags;
}
/**
@@ -114,7 +120,7 @@
* Return: SPSR_E_LITTLE or SPSR_E_BIG.
*
*/
-static int32_t get_xbl_endian(const struct xbl_partition *partition)
+static uint32_t get_xbl_endian(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & XBL_FLAGS_ENDIAN_MASK;
@@ -134,11 +140,13 @@
* Return: XBL_FLAGS_ESTATE_A32 or XBL_FLAGS_ESTATE_A64.
*
*/
-static int32_t get_xbl_estate(const struct xbl_partition *partition)
+static uint32_t get_xbl_estate(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & XBL_FLAGS_ESTATE_MASK;
- return flags >> XBL_FLAGS_ESTATE_SHIFT;
+ flags >>= XBL_FLAGS_ESTATE_SHIFT;
+
+ return flags;
}
#if defined(PLAT_versal_net)
@@ -148,11 +156,11 @@
*
* Return: cluster number for the partition.
*/
-static int32_t get_xbl_cluster(const struct xbl_partition *partition)
+static uint32_t get_xbl_cluster(const struct xbl_partition *partition)
{
uint64_t flags = partition->flags & XBL_FLAGS_CLUSTER_MASK;
- return (int32_t)(flags >> XBL_FLAGS_CLUSTER_SHIFT);
+ return (flags >> XBL_FLAGS_CLUSTER_SHIFT);
}
#endif /* PLAT_versal_net */
@@ -204,7 +212,7 @@
*/
for (size_t i = 0; i < HandoffParams->num_entries; i++) {
entry_point_info_t *image;
- int32_t target_estate, target_secure, target_cpu;
+ uint32_t target_estate, target_secure, target_cpu;
uint32_t target_endianness, target_el;
VERBOSE("BL31: %zd: entry:0x%" PRIx64 ", flags:0x%" PRIx64 "\n", i,
@@ -223,7 +231,7 @@
#endif /* PLAT_versal_net */
target_cpu = get_xbl_cpu(&HandoffParams->partition[i]);
- if (target_cpu != (int32_t)XBL_FLAGS_A53_0) {
+ if (target_cpu != XBL_FLAGS_A53_0) {
WARN("BL31: invalid target CPU (%i)\n", target_cpu);
continue;
}
@@ -236,8 +244,8 @@
continue;
}
- target_secure = (int32_t)get_xbl_ss(&HandoffParams->partition[i]);
- if ((target_secure == (int32_t)XBL_FLAGS_SECURE) &&
+ target_secure = get_xbl_ss(&HandoffParams->partition[i]);
+ if ((target_secure == XBL_FLAGS_SECURE) &&
(target_el == XBL_FLAGS_EL2)) {
WARN("BL31: invalid security state (%i) for exception level (%i)\n",
target_secure, target_el);
@@ -247,12 +255,12 @@
target_estate = get_xbl_estate(&HandoffParams->partition[i]);
target_endianness = get_xbl_endian(&HandoffParams->partition[i]);
- if (target_secure == (int32_t)XBL_FLAGS_SECURE) {
+ if (target_secure == XBL_FLAGS_SECURE) {
image = bl32;
- if (target_estate == (int32_t)XBL_FLAGS_ESTATE_A32) {
- bl32->spsr = SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
- target_endianness,
+ if (target_estate == XBL_FLAGS_ESTATE_A32) {
+ bl32->spsr = (uint32_t)SPSR_MODE32(MODE32_svc, SPSR_T_ARM,
+ (uint64_t)target_endianness,
DISABLE_ALL_EXCEPTIONS);
} else {
bl32->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
@@ -261,15 +269,15 @@
} else {
image = bl33;
- if (target_estate == (int32_t)XBL_FLAGS_ESTATE_A32) {
+ if (target_estate == XBL_FLAGS_ESTATE_A32) {
if (target_el == XBL_FLAGS_EL2) {
target_el = MODE32_hyp;
} else {
target_el = MODE32_sys;
}
- bl33->spsr = SPSR_MODE32(target_el, SPSR_T_ARM,
- target_endianness,
+ bl33->spsr = (uint32_t)SPSR_MODE32((uint64_t)target_el, SPSR_T_ARM,
+ (uint64_t)target_endianness,
DISABLE_ALL_EXCEPTIONS);
} else {
if (target_el == XBL_FLAGS_EL2) {
@@ -278,13 +286,13 @@
target_el = MODE_EL1;
}
- bl33->spsr = SPSR_64(target_el, MODE_SP_ELX,
+ bl33->spsr = (uint32_t)SPSR_64((uint64_t)target_el, MODE_SP_ELX,
DISABLE_ALL_EXCEPTIONS);
}
}
VERBOSE("Setting up %s entry point to:%" PRIx64 ", el:%x\n",
- (target_secure == (int32_t)XBL_FLAGS_SECURE) ? "BL32" : "BL33",
+ (target_secure == XBL_FLAGS_SECURE) ? "BL32" : "BL33",
HandoffParams->partition[i].entry_point,
target_el);
image->pc = HandoffParams->partition[i].entry_point;
diff --git a/plat/xilinx/common/pm_service/pm_svc_main.c b/plat/xilinx/common/pm_service/pm_svc_main.c
index f99a66f..fe496f3 100644
--- a/plat/xilinx/common/pm_service/pm_svc_main.c
+++ b/plat/xilinx/common/pm_service/pm_svc_main.c
@@ -160,7 +160,7 @@
/* Handle PMC case */
ret = pm_get_callbackdata(payload, ARRAY_SIZE(payload), 0, 0);
if (ret != PM_RET_SUCCESS) {
- payload[0] = ret;
+ payload[0] = (uint32_t)ret;
}
switch (payload[0]) {
@@ -278,7 +278,7 @@
gicd_write_irouter(gicv3_driver_data->gicd_base, PLAT_VERSAL_IPI_IRQ, MODE);
/* Register for idle callback during force power down/restart */
- ret = pm_register_notifier(primary_proc->node_id, EVENT_CPU_PWRDWN,
+ ret = (int32_t)pm_register_notifier(primary_proc->node_id, EVENT_CPU_PWRDWN,
0x0U, 0x1U, SECURE_FLAG);
if (ret != 0) {
WARN("BL31: registering idle callback for restart/force power down failed\n");
@@ -428,7 +428,7 @@
ret = pm_get_callbackdata(result, ARRAY_SIZE(result), security_flag, 1U);
if (ret != 0) {
- result[0] = ret;
+ result[0] = (uint32_t)ret;
}
SMC_RET2(handle,
diff --git a/plat/xilinx/common/versal.c b/plat/xilinx/common/versal.c
index b37dc76..7c29bae 100644
--- a/plat/xilinx/common/versal.c
+++ b/plat/xilinx/common/versal.c
@@ -60,5 +60,5 @@
*/
int32_t plat_get_soc_revision(void)
{
- return (platform_id & SOC_ID_REV_MASK);
+ return (int32_t)(platform_id & SOC_ID_REV_MASK);
}