refactor(neoverse-rd): unify GIC SPI range macros
The existing macros representing GIC SPI minimum and maximum for
multichip platforms lack a consistent naming convention. To address
this, establish the convention "NRD_CHIP<x>_SPI_MIN" and
"NRD_CHIP<x>_SPI_MAX" for use across all Neoverse Reference Design
multichip platforms.
Furthermore, extend this naming convention to RD-N2-Cfg2 and introduce
similar macros.
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: Idca2a8c66579f05e712e3b6e95204fedc122cf23
diff --git a/plat/arm/board/neoverse_rd/platform/rdn1edge/include/platform_def.h b/plat/arm/board/neoverse_rd/platform/rdn1edge/include/platform_def.h
index 5c27fc3..5357c31 100644
--- a/plat/arm/board/neoverse_rd/platform/rdn1edge/include/platform_def.h
+++ b/plat/arm/board/neoverse_rd/platform/rdn1edge/include/platform_def.h
@@ -37,7 +37,8 @@
#define PLAT_ARM_GICD_BASE UL(0x30000000)
#define PLAT_ARM_GICR_BASE UL(0x300C0000)
-#define RDN1E1_CHIP0_SPI_START U(32)
-#define RDN1E1_CHIP0_SPI_END U(991)
+/* GIC SPI range for multichip */
+#define NRD_CHIP0_SPI_MIN U(32)
+#define NRD_CHIP0_SPI_MAX U(991)
#endif /* PLATFORM_DEF_H */
diff --git a/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_plat.c b/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_plat.c
index 1a6bed6..ccabe22 100644
--- a/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_plat.c
+++ b/plat/arm/board/neoverse_rd/platform/rdn1edge/rdn1edge_plat.c
@@ -27,8 +27,9 @@
(PLAT_ARM_GICD_BASE + NRD_REMOTE_CHIP_MEM_OFFSET(1)) >> 16
},
.spi_ids = {
- {PLAT_ARM_GICD_BASE, RDN1E1_CHIP0_SPI_START,
- RDN1E1_CHIP0_SPI_END},
+ {PLAT_ARM_GICD_BASE,
+ NRD_CHIP0_SPI_MIN,
+ NRD_CHIP0_SPI_MAX},
{0, 0, 0}
}
};
diff --git a/plat/arm/board/neoverse_rd/platform/rdn2/include/platform_def.h b/plat/arm/board/neoverse_rd/platform/rdn2/include/platform_def.h
index c119e9f..f6f2b86 100644
--- a/plat/arm/board/neoverse_rd/platform/rdn2/include/platform_def.h
+++ b/plat/arm/board/neoverse_rd/platform/rdn2/include/platform_def.h
@@ -74,4 +74,20 @@
#define NRD_ADDR_BITS_PER_CHIP U(42) /* 4TB */
#endif
+/* GIC SPI range for multichip */
+#define NRD_CHIP0_SPI_MIN U(32)
+#define NRD_CHIP0_SPI_MAX U(511)
+#if NRD_CHIP_COUNT > 1
+#define NRD_CHIP1_SPI_MIN U(512)
+#define NRD_CHIP1_SPI_MAX U(991)
+#endif
+#if NRD_CHIP_COUNT > 2
+#define NRD_CHIP2_SPI_MIN U(4096)
+#define NRD_CHIP2_SPI_MAX U(4575)
+#endif
+#if NRD_CHIP_COUNT > 3
+#define NRD_CHIP3_SPI_MIN U(4576)
+#define NRD_CHIP3_SPI_MAX U(5055)
+#endif
+
#endif /* PLATFORM_DEF_H */
diff --git a/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_plat.c b/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_plat.c
index 7459679..b1046d6 100644
--- a/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_plat.c
+++ b/plat/arm/board/neoverse_rd/platform/rdn2/rdn2_plat.c
@@ -49,15 +49,23 @@
#endif
},
.spi_ids = {
- {PLAT_ARM_GICD_BASE, 32, 511},
+ {PLAT_ARM_GICD_BASE,
+ NRD_CHIP0_SPI_MIN,
+ NRD_CHIP0_SPI_MAX},
#if NRD_CHIP_COUNT > 1
- {PLAT_ARM_GICD_BASE, 512, 991},
+ {PLAT_ARM_GICD_BASE,
+ NRD_CHIP1_SPI_MIN,
+ NRD_CHIP1_SPI_MAX},
#endif
#if NRD_CHIP_COUNT > 2
- {PLAT_ARM_GICD_BASE, 4096, 4575},
+ {PLAT_ARM_GICD_BASE,
+ NRD_CHIP2_SPI_MIN,
+ NRD_CHIP2_SPI_MAX},
#endif
#if NRD_CHIP_COUNT > 3
- {PLAT_ARM_GICD_BASE, 4576, 5055},
+ {PLAT_ARM_GICD_BASE,
+ NRD_CHIP3_SPI_MIN,
+ NRD_CHIP3_SPI_MAX},
#endif
}
};
diff --git a/plat/arm/board/neoverse_rd/platform/rdv1mc/include/platform_def.h b/plat/arm/board/neoverse_rd/platform/rdv1mc/include/platform_def.h
index 2cec57c..b4c5c0a 100644
--- a/plat/arm/board/neoverse_rd/platform/rdv1mc/include/platform_def.h
+++ b/plat/arm/board/neoverse_rd/platform/rdv1mc/include/platform_def.h
@@ -56,7 +56,8 @@
#define PLAT_ARM_GICD_BASE UL(0x30000000)
#define PLAT_ARM_GICR_BASE UL(0x30140000)
-#define RDV1MC_CHIP0_SPI_START U(32)
-#define RDV1MC_CHIP0_SPI_END U(991)
+/* GIC SPI range for multichip */
+#define NRD_CHIP0_SPI_MIN U(32)
+#define NRD_CHIP0_SPI_MAX U(991)
#endif /* PLATFORM_DEF_H */
diff --git a/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_plat.c b/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_plat.c
index e316a1c..5713cb9 100644
--- a/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_plat.c
+++ b/plat/arm/board/neoverse_rd/platform/rdv1mc/rdv1mc_plat.c
@@ -43,8 +43,9 @@
#endif
},
.spi_ids = {
- {PLAT_ARM_GICD_BASE, RDV1MC_CHIP0_SPI_START,
- RDV1MC_CHIP0_SPI_END},
+ {PLAT_ARM_GICD_BASE,
+ NRD_CHIP0_SPI_MIN,
+ NRD_CHIP0_SPI_MAX},
{0, 0, 0},
#if (NRD_CHIP_COUNT > 2)
{0, 0, 0},