commit cb808b41f4536f3a57a494468d7b24a048a3cc71
author Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> Wed Feb 26 15:14:01 2025 +0100
committer Yann Gautier <yann.gautier@st.com> Tue Apr 01 17:05:14 2025 +0200
tree efb298fe0eab784733076d93804f213e99b174ee
parent f69b3ad6aabb5d5a69a2ef37f80a225b457e0e0c

feat(stm32mp25-fdts): enable WDQS for LPDDR4

Enable WDQS extension mode requested by some device manufacturers.
No impact on other devices.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I010b3932dd363c03e34b879fd68adae6dd28c27a

fdts/stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi

diff --git a/fdts/stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi b/fdts/stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi
index 53d6b7d..0df2a4d 100644
--- a/fdts/stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi
+++ b/fdts/stm32mp25-lpddr4-1x32Gbits-1x32bits-1200MHz.dtsi
@@ -161,7 +161,7 @@
 #define DDR_UIA_DISDYNADRTRI_0 0x00000001
 #define DDR_UIA_PHYMSTRTRAININTERVAL_0 0x0000000A
 #define DDR_UIA_PHYMSTRMAXREQTOACK_0 0x00000005
-#define DDR_UIA_WDQSEXT 0x00000000
+#define DDR_UIA_WDQSEXT 0x00000001
 #define DDR_UIA_CALINTERVAL 0x00000009
 #define DDR_UIA_CALONCE 0x00000000
 #define DDR_UIA_LP4RL_0 0x00000004