Tegra194: validate C6 power state type
This patch validates that PSTATE_STANDBY is set as the C6 power state type.
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Change-Id: I26a4a61bcb4ee0d1846ab61c007eeba3c180e5aa
diff --git a/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
index 8f6e19f..e226372 100644
--- a/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
@@ -73,6 +73,11 @@
switch (state_id) {
case PSTATE_ID_CORE_IDLE:
+ if (psci_get_pstate_type(power_state) != PSTATE_TYPE_STANDBY) {
+ ret = PSCI_E_INVALID_PARAMS;
+ break;
+ }
+
/* Core idle request */
req_state->pwr_domain_state[MPIDR_AFFLVL0] = PLAT_MAX_RET_STATE;
req_state->pwr_domain_state[MPIDR_AFFLVL1] = PSCI_LOCAL_STATE_RUN;