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git01.mediatek.com / filogic / atf / cabcad574586ec603d842be282c36f0b22064cf2 / . / plat / xilinx / versal_net
tree: 61ebdc97193147c98d5920048fb213c6ee0b93c3 [path history] [tgz]
  1. aarch64/
  2. include/
  3. pm_service/
  4. bl31_versal_net_setup.c
  5. plat_psci.c
  6. plat_psci_pm.c
  7. plat_topology.c
  8. platform.mk
  9. sip_svc_setup.c
  10. versal_net_gicv3.c
  11. versal_net_ipi.c