Add support for handling runtime service requests
This patch uses the reworked exception handling support to handle
runtime service requests through SMCs following the SMC calling
convention. This is a giant commit since all the changes are
inter-related. It does the following:
1. Replace the old exception handling mechanism with the new one
2. Enforce that SP_EL0 is used C runtime stacks.
3. Ensures that the cold and warm boot paths use the 'cpu_context'
structure to program an ERET into the next lower EL.
4. Ensures that SP_EL3 always points to the next 'cpu_context'
structure prior to an ERET into the next lower EL
5. Introduces a PSCI SMC handler which completes the use of PSCI as a
runtime service
Change-Id: I661797f834c0803d2c674d20f504df1b04c2b852
Co-authored-by: Achin Gupta <achin.gupta@arm.com>
diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S
index cd0c023..1b8488d 100644
--- a/bl31/aarch64/bl31_entrypoint.S
+++ b/bl31/aarch64/bl31_entrypoint.S
@@ -31,6 +31,7 @@
#include <bl_common.h>
#include <platform.h>
#include <arch.h>
+#include "cm_macros.S"
.globl bl31_entrypoint
@@ -129,6 +130,12 @@
ldr x1, =__COHERENT_RAM_UNALIGNED_SIZE__
bl zeromem16
+ /* ---------------------------------------------
+ * Use SP_EL0 for the C runtime stack.
+ * ---------------------------------------------
+ */
+ msr spsel, #0
+
/* --------------------------------------------
* Give ourselves a small coherent stack to
* ease the pain of initializing the MMU
@@ -155,32 +162,26 @@
bl platform_set_stack
/* ---------------------------------------------
- * Use the more complex exception vectors now
- * the stacks are setup.
+ * Jump to main function.
* ---------------------------------------------
*/
- adr x1, runtime_exceptions
- msr vbar_el3, x1
+ bl bl31_main
/* ---------------------------------------------
- * Use SP_EL0 to initialize BL31. It allows us
- * to jump to the next image without having to
- * come back here to ensure all of the stack's
- * been popped out. run_image() is not nice
- * enough to reset the stack pointer before
- * handing control to the next stage.
+ * Use the more complex exception vectors now
+ * that context management is setup. SP_EL3 is
+ * pointing to a 'cpu_context' structure which
+ * has an exception stack allocated. Since
+ * we're just about to leave this EL with ERET,
+ * we don't need an ISB here
* ---------------------------------------------
*/
- mov x0, sp
- msr sp_el0, x0
- msr spsel, #0
- isb
+ adr x1, runtime_exceptions
+ msr vbar_el3, x1
- /* ---------------------------------------------
- * Jump to main function.
- * ---------------------------------------------
- */
- bl bl31_main
+ zero_callee_saved_regs
+ b el3_exit
_panic:
+ wfi
b _panic