tree d81bbf9189156000ec099b6b1d267a64c41d3bfd
parent 44e33e09e929692232df76c0f264751d803be521
author Andre Przywara <andre.przywara@arm.com> 1669385413 +0000
committer Andre Przywara <andre.przywara@arm.com> 1679492002 +0000

refactor(cpufeat): use alternative encoding for "SB" barrier

The "sb" barrier instruction is a rather new addition to the AArch64
instruction set, so it is not recognised by all toolchains. On top of
that, the GNU assembler denies this instruction, unless a compatible
processor is selected:
asm_macros.S:223: Error: selected processor does not support `sb'

Provide an alternative encoding of the "sb" instruction, by using a
system register write, as this is the group where the barrier
instructions borrow their encoding space from.
This results in the exact same opcode to be generated, and any
disassembler will decode this instruction as "sb".

Change-Id: I5f44c8321e0cc04c784e02bd838e964602a96a8e
Signed-off-by: Andre Przywara <andre.przywara@arm.com>